research-article

Public Access

3D nanosystems enable embedded abundant-data computing: special session paper

Authors:

Mohamed M. Sabry Aly,

Yash H. Malviya,

Christos Kozyrakis,

H.-S. Philip Wong,

Subhasish MitraAuthors Info & Claims

CODES '17: Proceedings of the Twelfth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis Companion

Article No.: 29, Pages 1 - 2

https://doi.org/10.1145/3125502.3125531

Published: 15 October 2017 Publication History

Abstract

The world's appetite for abundant-data computing, where a massive amount of structured and unstructured data is analyzed, has increased dramatically. The computational demands of these applications, such as deep learning, far exceed the capabilities of today's systems, especially for energy-constrained embedded systems (e.g., mobile systems with limited battery capacity). These demands are unlikely to be met by isolated improvements in transistor or memory technologies, or integrated circuit (IC) architectures alone. Transformative nanosystems, which leverage the unique properties of emerging nanotechnologies to create new IC architectures, are required to deliver unprecedented functionality, performance, and energy efficiency. We show that the projected energy efficiency benefits of domain-specific 3D nanosystems is in the range of 1,000x (quantified using the product of system-level energy consumption and execution time) over today's domain-specific 2D systems with off-chip DRAM. Such a drastic improvement is key to enabling new capabilities such as deep learning in embedded systems.

References

[1]

M.M.S. Aly et al., "Energy-Efficient Abundant-Data Computing: The N3XT 1,000X," IEEE Computer, 2015.

[2]

J. Zhang et al., "Carbon Nanotube Robust Digital VLSI," IEEE Trans. CAD, 2012.

[3]

H.Y. Chen et al., "HfOx based vertical resistive random-access memory for cost-effective 3D cross-point architecture without cell selector," IEDM, 2012.

[4]

D.J. Frank and L. Chang, "Technology Optimization for High Energy-Efficiency Computation," IEDM Short Course, 2012.

[5]

G. Hills, "Variation-Aware Nanosystem Design Kit", https://nanohub.org/resources/22582

[6]

G. Hills et al., "Rapid Co-optimization of Processing and Circuit Design to Overcome Carbon Nanotube Variations," IEEE Trans. CAD, 2015.

[7]

M.M. Shulaker et al., "Carbon nanotube computer," Nature, 2013.

[8]

H.-S.P. Wong and S. Salahuddin, "Memory Leads the way to better computing," Nature, 2015.

[9]

R. Fackenthal et al., "A 16Gb ReRAM with 200MB/s Write and 1GB/s Read in 27nm Technology," ISSCC, 2014.

[10]

M.M. Shulaker et al., "Three-dimensional integration of nanotechnologies for computing and data storage on a single chip," Nature, 2017.

[11]

R. Braojos et al., "Nano-engineered architectures for ultra-low power wireless body sensor nodes," CODES+ISSS, 2016.

[12]

N. Jouppi et al. "In-Datacenter Performance Analysis of a Tensor Processing Unit," ISCA, 2017.

Digital Library

[13]

M. Gao et al., "TETRIS: Scalable and Efficient Neural Network Acceleration with 3D Memory," ASPLOS, 2017.

Digital Library

[14]

Y.-H. Chen et al., "Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks," IEEE JSSCC, 2017.

[15]

C. De Sa et al., "Understanding and Optimizing Asynchronous Low-precision Stochastic Gradient Descent," ISCA, 2017.

[16]

D. Sanchez et al., "ZSim: Fast and Accurate Microarchitectural Simulation of Thousand-Core Systems," ISCA, 2013.

Digital Library

[17]

V. Sze et al., "Efficient Processing of Deep Neural Networks:A Tutorial and Survey," arXiv preprint, 2017.

[18]

A. Sridhar et al., "3D-ICE: A Compact Thermal Model for Early-Stage Design of Liquid-Cooled ICs," IEEE Trans. Computers, 2014.

[19]

V. Chiriac et al., "A figure of merit for mobile device thermal management," IEEE ITherm, 2016.

[20]

O. Vinyals et al., "Show and Tell: A Neural Image Caption Generator," IEEE CVPR, 2015.

[21]

R. Jozefowicz et al., "Exploring the Limits of Language Modeling," arXiv preprint, 2016.

[22]

A. Krizhevsky et al., "ImageNet Classification with Deep Convolution Neural Networks," NIPS, 2012.

[23]

K. Simoyan et al., "Very Deep Convolutional Networks for Large-Scale Image Recognition," ICLR, 2015.

[24]

K. He et al., "Deep Residual Learning for Image Recognition," IEEE CVPR, 2016.

Cited By

Senthilsingh CSujihelen LKumar B(2024)Evaluating The Design and Implementation of Tranceivers Powered by Carbon Nanotube Field Effect Transistor For Interconnects2024 5th International Conference on Innovative Trends in Information Technology (ICITIIT)10.1109/ICITIIT61487.2024.10580289(1-6)Online publication date: 15-Mar-2024
https://doi.org/10.1109/ICITIIT61487.2024.10580289
Bartolo ASabry Aly MMichelogiannakis GMitra S(2023)MC-ELMM: Multi-Chip Endurance-Limited Memory ManagementProceedings of the International Symposium on Memory Systems10.1145/3631882.3631905(1-16)Online publication date: 2-Oct-2023
https://dl.acm.org/doi/10.1145/3631882.3631905
Or-Bach Z(2020)A 1000× Improvement of the Processor-Memory GapNANO-CHIPS 203010.1007/978-3-030-18338-7_15(247-267)Online publication date: 9-Jun-2020
https://doi.org/10.1007/978-3-030-18338-7_15
Show More Cited By

Recommendations

Improving Performance under Process and Voltage Variations in Near-Threshold Computing Using 3D ICs

Near-threshold computing (NTC) circuits have been shown to offer significant energy efficiency and power benefits but with a huge performance penalty. This performance loss exacerbates if process and voltage variations are considered. In this article, ...
Application of high-κ gate dielectrics and metal gate electrodes to enable silicon and non-silicon logic nanotechnology

High- gate dielectrics and metal gate electrodes are required for enabling continued equivalent gate oxide thickness scaling, and hence high performance, and for controlling gate oxide leakage for both future silicon and emerging non-silicon ...
Embedded Tutorial: Analog Circuit Performance Issues with Aggressively Scaled Gate Oxide CMOS Technologies
VLSID '06: Proceedings of the 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design

MOS Transistors with sub 100 nm channel lengths need a gate oxide thickness in the range of 1 - 2 nm to combat the short channel effects. However at these gate dielectric thicknesses, the gate current is no longer negligible. In this paper, we report ...

Comments

Information & Contributors

Information

Published In

cover image ACM Other conferences

CODES '17: Proceedings of the Twelfth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis Companion

October 2017

84 pages

ISBN:9781450351850

DOI:10.1145/3125502

Copyright © 2017 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 15 October 2017

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Qualifiers

Research-article

Funding Sources

National Science Foundation
Semiconductor Research Corporation
Defense Advanced Research Projects Agency
Stanford SystemX Alliance

Conference

ESWEEK'17

ESWEEK'17: THIRTEENTH EMBEDDED SYSTEM WEEK

October 15 - 20, 2017

Seoul, Republic of Korea

Acceptance Rates

Overall Acceptance Rate 280 of 864 submissions, 32%

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

9
Total Citations
View Citations
456
Total Downloads

Downloads (Last 12 months)55
Downloads (Last 6 weeks)8

Reflects downloads up to 17 Oct 2024

Other Metrics

View Author Metrics

Citations

Cited By

Senthilsingh CSujihelen LKumar B(2024)Evaluating The Design and Implementation of Tranceivers Powered by Carbon Nanotube Field Effect Transistor For Interconnects2024 5th International Conference on Innovative Trends in Information Technology (ICITIIT)10.1109/ICITIIT61487.2024.10580289(1-6)Online publication date: 15-Mar-2024
https://doi.org/10.1109/ICITIIT61487.2024.10580289
Bartolo ASabry Aly MMichelogiannakis GMitra S(2023)MC-ELMM: Multi-Chip Endurance-Limited Memory ManagementProceedings of the International Symposium on Memory Systems10.1145/3631882.3631905(1-16)Online publication date: 2-Oct-2023
https://dl.acm.org/doi/10.1145/3631882.3631905
Or-Bach Z(2020)A 1000× Improvement of the Processor-Memory GapNANO-CHIPS 203010.1007/978-3-030-18338-7_15(247-267)Online publication date: 9-Jun-2020
https://doi.org/10.1007/978-3-030-18338-7_15
Stow DAkgun IHuangfu WXie YLi XLoh G(2019)Efficient System Architecture in the Era of Monolithic 3DProceedings of the 56th Annual Design Automation Conference 201910.1145/3316781.3323475(1-4)Online publication date: 2-Jun-2019
https://dl.acm.org/doi/10.1145/3316781.3323475
Sabry Aly MWu TBartolo AMalviya YHwang WHills GMarkov IWootters MShulaker MPhilip Wong HMitra S(2019)The N3XT Approach to Energy-Efficient Abundant-Data ComputingProceedings of the IEEE10.1109/JPROC.2018.2882603107:1(19-48)Online publication date: Jan-2019
https://doi.org/10.1109/JPROC.2018.2882603
Masri IMartin PMondal HAllanic RGouguec TQuendo CRoland CDiguet JLu ZVangal SXu JBogdan P(2018)Accurate channel models for realistic design space exploration of future wireless NoCsProceedings of the Twelfth IEEE/ACM International Symposium on Networks-on-Chip10.5555/3306619.3306638(1-8)Online publication date: 4-Oct-2018
https://dl.acm.org/doi/10.5555/3306619.3306638
Hills GBankman DMoons BYang LHillard JKahng APark RVerhelst MMurmann BShulaker MWong HMitra S(2018)TRIGProceedings of the 55th Annual Design Automation Conference10.1145/3195970.3196132(1-10)Online publication date: 24-Jun-2018
https://dl.acm.org/doi/10.1145/3195970.3196132
Hills GBardon MDoornbos GYakimets DSchuddinck PBaert RJang DMattii LSherazi SRodopoulos DRitzenthaler RLee CThean ARadu ISpessot ADebacker PCatthoor FRaghavan PShulaker MWong HMitra S(2018)Understanding Energy Efficiency Benefits of Carbon Nanotube Field-Effect Transistors for Digital VLSIIEEE Transactions on Nanotechnology10.1109/TNANO.2018.287184117:6(1259-1269)Online publication date: Nov-2018
https://doi.org/10.1109/TNANO.2018.2871841
Masri IMartin PMondal HAllanic RLe Gouguec TQuendo CRoland CDiguet J(2018)Accurate Channel Models for Realistic Design Space Exploration of Future Wireless NoCs2018 Twelfth IEEE/ACM International Symposium on Networks-on-Chip (NOCS)10.1109/NOCS.2018.8512171(1-8)Online publication date: Oct-2018
https://doi.org/10.1109/NOCS.2018.8512171

View Options

View options

PDF

View or Download as a PDF file.

eReader

View online with eReader.

Get Access

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Publication

Media

Figures

Other

Tables

View Table of Contents