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ORCIDYoshiyuki Nakamura
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2020 – today
- 2022
[c22]Hitoshi Iima, Yoshiyuki Nakamura:
Hyperheuristic Method Based on Deep Reinforcement Learning. IIAI-AAI 2022: 303-306
2010 – 2019
- 2018
- [c21]Michihiro Shintani
, Michiko Inoue, Yoshiyuki Nakamura:
Artificial Neural Network Based Test Escape Screening Using Generative Model. ITC 2018: 1-8 - [c20]Takeru Nishimi, Yasuo Sato, Seiji Kajihara, Yoshiyuki Nakamura:
Good Die Prediction Modelling from Limited Test Items. ITC-Asia 2018: 115-120 - 2010
- [c19]Yoshiyuki Nakamura, Masashi Tanaka:
A Multi-dimensional Iddq Testing Method Using Mahalanobis Distance. DFT 2010: 303-309 - [c18]Yoshiyuki Nakamura, Maiko Kobayakawa, Chisato Takami, Yuta Tsuruga, Hidekazu Kubota, Masahiro Hamasaki, Takuichi Nishimura, Takeshi Sunaga:
Zuzie: Collaborative Storytelling Based on Multiple Compositions. ICIDS 2010: 117-122
2000 – 2009
- 2009
- [c17]Tom Hope, Yoshiyuki Nakamura, Toru Takahashi, Atsushi Nobayashi, Shota Fukuoka, Masahiro Hamasaki, Takuichi Nishimura:
Familial collaborations in a museum. CHI 2009: 1963-1972 - 2008
- [c16]Tomonori Sasaki, Yoshiyuki Nakamura, Toshiharu Asaka:
Shared At-Speed BIST for Parallel Test of SRAMs with Different Address Sizes. ATS 2008: 267 - [c15]Yoshiyuki Nakamura, Kenji Tei, Yoshiaki Fukazawa, Shinichi Honiden:
Region-Based Sensor Selection for Wireless Sensor Networks. SUTC 2008: 326-331 - 2007
- [j7]Yoshiyuki Nakamura, Thomas Clouqueur, Kewal K. Saluja, Hideo Fujiwara:
Diagnosing At-Speed Scan BIST Circuits Using a Low Speed and Low Memory Tester. IEEE Trans. Very Large Scale Integr. Syst. 15(7): 790-800 (2007) - [c14]Tom Hope, Masahiro Hamasaki, Keisuke Ishida, Noriyuki Fujimura, Yoshiyuki Nakamura, Takuichi Nishimura:
Locating Culture in HCI with Information Kiosks and Social Networks. HCI (10) 2007: 99-107 - [c13]Yutaka Matsuo, Naoaki Okazaki, Kiyoshi Izumi, Yoshiyuki Nakamura, Takuichi Nishimura, Kôiti Hasida, Hideyuki Nakashima:
Inferring Long-term User Properties Based on Users' Location History. IJCAI 2007: 2159-2165 - 2006
- [j6]Yoshiyuki Nakamura, Thomas Clouqueur, Kewal K. Saluja, Hideo Fujiwara:
Error Identification in At-Speed Scan BIST Environment in the Presence of Circuit and Tester Speed Mismatch. IEICE Trans. Inf. Syst. 89-D(3): 1165-1172 (2006) - [j5]Yoshiyuki Nakamura, Jacob Savir, Hideo Fujiwara:
Effect of BIST Pretest on IC Defect Level. IEICE Trans. Inf. Syst. 89-D(10): 2626-2636 (2006) - [c12]Yutaka Matsuo, Masahiro Hamasaki, Yoshiyuki Nakamura, Takuichi Nishimura, Kôiti Hasida, Hideaki Takeda, Junichiro Mori, Danushka Bollegala, Mitsuru Ishizuka:
Spinning Multiple Social Networks for Semantic Web. AAAI 2006: 1381-1387 - [c11]Kosuke Numa, Hideaki Takeda, Hiroki Uematsu, Takuichi Nishimura, Yutaka Matsuo, Masahiro Hamasaki, Noriyuki Fujimura, Keisuke Ishida, Tom Hope, Yoshiyuki Nakamura, Satoshi Fujiyoshi, Kazuya Sakamoto, Hiroshi Nagata, Osamu Nakagawa, Eiji Shinbori:
A Weblog Grounded to the Real World. AAAI Spring Symposium: Computational Approaches to Analyzing Weblogs 2006: 168-175 - [c10]Masahiro Hamasaki, Yutaka Matsuo, Keisuke Ishida, Yoshiyuki Nakamura, Takuichi Nishimura, Hideaki Takeda:
Community Focused Social Network Extraction. ASWC 2006: 155-161 - [c9]Yoshiyuki Nakamura, Thomas Clouqueur, Kewal K. Saluja, Hideo Fujiwara:
Diagnosing At-Speed Scan BIST Circuits Using a Low Speed and Low Memory Tester. ATS 2006: 409-414 - [c8]Tom Hope, Masahiro Hamasaki, Yutaka Matsuo, Yoshiyuki Nakamura, Noriyuki Fujimura, Takuichi Nishimura:
Doing Community: Co-construction of Meaning and Use with Interactive Information Kiosks. UbiComp 2006: 387-403 - [c7]Yoshiyuki Nakamura, Jacob Savir, Hideo Fujiwara:
BIST Pretest of ICs: Risks and Benefits. VTS 2006: 142-149 - [c6]Kosuke Numa, Hideaki Takeda, Takuichi Nishimura, Yutaka Matsuo, Masahiro Hamasaki, Noriyuki Fujimura, Keisuke Ishida, Tom Hope, Yoshiyuki Nakamura, Satoshi Fujiyoshi, Kazuya Sakamoto, Hiroshi Nagata, Osamu Nakagawa, Eiji Shinbori:
Context-Aware Weblog to Enhance Communication among Participants in a Conference. WEBIST (1) 2006: 400-407 - 2005
- [j4]Yoshiyuki Nakamura, Jacob Savir, Hideo Fujiwara:
Defect Level vs. Yield and Fault Coverage in the Presence of an Unreliable BIST. IEICE Trans. Inf. Syst. 88-D(6): 1210-1216 (2005) - [c5]Yoshiyuki Nakamura, Nobuo Miyazaki, Kazuya Sakamoto, Yoichi Motomura, Takeshi Kurata, Takuichi Nishimura:
A Location-Based Information Support Infrastructure System using CoBIT. PSC 2005: 63-70 - 2004
- [c4]Takuichi Nishimura, Yoshiyuki Nakamura, Hideo Itoh, Hideyuki Nakashima:
System Design of Event Space Information Support Utilizing CoBITs. ICDCS Workshops 2004: 384-387 - [c3]Takuichi Nishimura, Hideo Itoh, Yoshiyuki Nakamura, Yoshinobu Yamamoto, Hideyuki Nakashima:
A Compact Battery-Less Information Terminal for Real World Interaction. Pervasive 2004: 124-139 - 2003
- [j3]Yoshikatsu Tada, Nobuhiko Fukuda, Tomoyuki Suzuka, Yoshiyuki Nakamura:
A kernel thread running on the outside of the kernel and its implementation. Syst. Comput. Jpn. 34(8): 42-50 (2003) - [c2]Yoshiyuki Nakamura, Takuichi Nishimura, Hideo Itoh, Hideyuki Nakashima:
A System of Card Type Battery-Less Information Terminal: CardBIT for Situated Interactio. PerCom 2003: 369-377
1990 – 1999
- 1997
- [c1]Toshinobu Ono, Kazuo Wakui, Hitoshi Hikima, Yoshiyuki Nakamura, Masaaki Yoshida:
Integrated and Automated Design-for-Testability Implementation for Cell-Based ICs. Asian Test Symposium 1997: 122-125 - 1995
- [j2]Minoru Harada, Junichi Nishimurae, Yoshiyuki Nakamura:
Automatic process design from nonprocedural specification. Syst. Comput. Jpn. 26(3): 1-16 (1995) - 1992
- [j1]Teruhiko Yamada, Yoshiyuki Nakamura:
A method of diagnosing single stuck-at faults in combinational circuits. Syst. Comput. Jpn. 23(14): 35-44 (1992)
Coauthor Index
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