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2020 – today
- 2020
[j20]Luis A. Plana
, Jim D. Garside, Jonathan Heathcote, Jeffrey Pepper, Steve Temple, Simon Davidson, Mikel Luján, Steve B. Furber:
spiNNlink: FPGA-Based Interconnect for the Million-Core SpiNNaker System. IEEE Access 8: 84918-84928 (2020)
2010 – 2019
- 2017
- [j19]Amirreza Yousefzadeh, Miroslaw Jablonski, Taras Iakymchuk, Alejandro Linares-Barranco, Alfredo Rosado, Luis A. Plana, Steve Temple, Teresa Serrano-Gotarredona, Steve B. Furber, Bernabé Linares-Barranco:
On Multiple AER Handshaking Channels Over High-Speed Bit-Serial Bidirectional LVDS Links With Flow-Control and Clock-Correction on Commercial FPGAs for Scalable Neuromorphic Systems. IEEE Trans. Biomed. Circuits Syst. 11(5): 1133-1147 (2017) - [c15]Robert James, Jim D. Garside, Michael Hopkins, Luis A. Plana, Steve Temple, Simon Davidson, Steve B. Furber:
Parallel distribution of an inner hair cell and auditory nerve model for real-time application. BioCAS 2017: 1-4 - [c14]Sebastian Höppner, Yexin Yan, Bernhard Vogginger, Andreas Dixius, Johannes Partzsch, Prateek Joshi, Felix Neumärker, Stephan Hartmann, Stefan Schiefer, Stefan Scholze, Georg Ellguth, Love Cederstroem, Matthias Eberlein, Christian Mayr, Steve Temple, Luis A. Plana, Jim D. Garside, Simon Davidson, David R. Lester, Steve B. Furber:
Live demonstration: Dynamic voltage and frequency scaling for neuromorphic many-core systems. ISCAS 2017: 1 - [c13]Sebastian Höppner, Yexin Yan, Bernhard Vogginger, Andreas Dixius, Johannes Partzsch, Felix Neumärker, Stephan Hartmann, Stefan Schiefer, Stefan Scholze, Georg Ellguth, Love Cederstroem, Matthias Eberlein, Christian Mayr, Steve Temple, Luis A. Plana, Jim D. Garside, Simon Davidson, David R. Lester, Steve B. Furber:
Dynamic voltage and frequency scaling for neuromorphic many-core systems. ISCAS 2017: 1-4 - 2016
- [j18]Amirreza Yousefzadeh, Luis A. Plana, Steve Temple, Teresa Serrano-Gotarredona, Steve B. Furber, Bernabé Linares-Barranco:
Fast Predictive Handshaking in Synchronous FPGAs for Fully Asynchronous Multisymbol Chip Links: Application to SpiNNaker 2-of-7 Links. IEEE Trans. Circuits Syst. II Express Briefs 63-II(8): 763-767 (2016) - 2015
- [j17]Javier Navaridas, Mikel Luján, Luis A. Plana, Steve Temple, Steve B. Furber:
SpiNNaker: Enhanced multicast routing. Parallel Comput. 45: 49-66 (2015) - [j16]Andrew D. Brown, Stephen B. Furber, Jeffrey S. Reeve, Jim D. Garside, Kier J. Dugan, Luis A. Plana, Steve Temple:
SpiNNaker - Programming Model. IEEE Trans. Computers 64(6): 1769-1782 (2015) - 2014
- [j15]Steve B. Furber, Francesco Galluppi, Steve Temple, Luis A. Plana:
The SpiNNaker Project. Proc. IEEE 102(5): 652-665 (2014) - [c12]Javier Navaridas, Mikel Luján, Luis A. Plana, Steve Temple, Steve B. Furber:
On generating multicast routes for SpiNNaker. Conf. Computing Frontiers 2014: 2:1-2:10 - 2013
- [j14]Eustace Painkras, Luis A. Plana, Jim D. Garside, Steve Temple, Francesco Galluppi, Cameron Patterson, David R. Lester, Andrew D. Brown, Steve B. Furber:
SpiNNaker: A 1-W 18-Core System-on-Chip for Massively-Parallel Neural Network Simulation. IEEE J. Solid State Circuits 48(8): 1943-1953 (2013) - [j13]Javier Navaridas, Steve B. Furber, Jim D. Garside, Xin Jin, Mukaram M. Khan, David R. Lester, Mikel Luján, José Miguel-Alonso, Eustace Painkras, Cameron Patterson, Luis A. Plana, Alexander D. Rast, Dominic Richards, Yebin Shi, Steve Temple, Jian Wu, Shufan Yang:
SpiNNaker: Fault tolerance in a power- and area- constrained large-scale neuromimetic architecture. Parallel Comput. 39(11): 693-708 (2013) - [j12]Steve B. Furber, David R. Lester, Luis A. Plana, Jim D. Garside, Eustace Painkras, Steve Temple, Andrew D. Brown:
Overview of the SpiNNaker System Architecture. IEEE Trans. Computers 62(12): 2454-2467 (2013) - [c11]Alexander D. Rast, Johannes Partzsch, Christian Mayr, Johannes Schemmel, Stefan Hartmann, Luis A. Plana, Steve Temple, David R. Lester, René Schüffny, Steve B. Furber:
A location-independent direct link neuromorphic interface. IJCNN 2013: 1-8 - 2012
- [j11]Cameron Patterson, Jim D. Garside, Eustace Painkras, Steve Temple, Luis A. Plana, Javier Navaridas, Thomas Sharp, Steve B. Furber:
Scalable communications for a million-core neural processing architecture. J. Parallel Distributed Comput. 72(11): 1507-1520 (2012) - [c10]Jim D. Garside, Stephen B. Furber, Steve Temple, David M. Clark, Luis A. Plana:
An Asynchronous Fully Digital Delay Locked Loop for DDR SDRAM Data Recovery. ASYNC 2012: 49-56 - [c9]Eustace Painkras, Luis A. Plana, Jim D. Garside, Steve Temple, Simon Davidson, Jeffrey Pepper, David M. Clark, Cameron Patterson, Steve B. Furber:
SpiNNaker: A multi-core System-on-Chip for massively-parallel neural net simulation. CICC 2012: 1-4 - 2011
- [j10]Luis A. Plana, David M. Clark, Simon Davidson, Steve B. Furber, Jim D. Garside, Eustace Painkras, Jeffrey Pepper, Steve Temple, John Bainbridge:
SpiNNaker: Design and Implementation of a GALS Multicore System-on-Chip. ACM J. Emerg. Technol. Comput. Syst. 7(4): 17:1-17:18 (2011) - [j9]Mukaram M. Khan, Alexander D. Rast, Javier Navaridas, X. Jin, Luis A. Plana, Mikel Luján, Steve Temple, Cameron Patterson, Dominic Richards, John V. Woods, José Miguel-Alonso, Stephen B. Furber:
Event-driven configuration of a neural network CMP system over an homogeneous interconnect fabric. Parallel Comput. 37(8): 392-409 (2011) - 2010
- [j8]Xin Jin, Mikel Luján, Luis A. Plana, Sergio Davies, Steve Temple, Steve B. Furber:
Modeling Spiking Neural Networks on SpiNNaker. Comput. Sci. Eng. 12(5): 91-97 (2010) - [c8]Xin Jin, Francesco Galluppi, Cameron Patterson, Alexander D. Rast, Sergio Davies, Steve Temple, Steve B. Furber:
Algorithm and software for simulation of spiking neural networks on the multi-chip SpiNNaker system. IJCNN 2010: 1-8
2000 – 2009
- 2009
- [c7]Jim D. Garside, Stephen B. Furber, Steve Temple, Viv Woods:
The Amulet chips: Architectural development for asynchronous microprocessors. ICECS 2009: 343-346 - 2008
- [p1]Steve B. Furber, Steve Temple:
Neural Systems Engineering. Computational Intelligence: A Compendium 2008: 763-796 - 2007
- [j7]Luis A. Plana, Stephen B. Furber, Steve Temple, Muhammad Mukaram Khan, Yebin Shi, Jian Wu, Shufan Yang:
A GALS Infrastructure for a Massively Parallel Multiprocessor. IEEE Des. Test Comput. 24(5): 454-463 (2007) - 2006
- [c6]Stephen B. Furber, Steve Temple, Andrew D. Brown:
On-chip and inter-chip networks for modeling large-scale neural systems. ISCAS 2006 - 2004
- [j6]Stephen B. Furber, John Bainbridge, J. Mike Cumpstey, Steve Temple:
Sparse distributed memory using N-of-M codes. Neural Networks 17(10): 1437-1451 (2004) - 2003
- [j5]Luis A. Plana, Peter A. Riocreux, W. J. Bainbridge, Andrew Bardsley, Steve Temple, Jim D. Garside, Z. C. Yu:
SPA - a secure Amulet core for smartcard applications. Microprocess. Microsystems 27(9): 431-446 (2003) - 2002
- [c5]W. J. Bainbridge, Andrew Bardsley, Steve Temple, Jim D. Garside, Peter A. Riocreux, Luis A. Plana:
SPA - A Synthesisable Amulet Core for Smartcard pplications. ASYNC 2002: 201-210 - 2001
- [j4]Stephen B. Furber, Aristides Efthymiou, Jim D. Garside, David W. Lloyd, Mike J. G. Lewis, Steve Temple:
Power Management in the Amulet Microprocessors. IEEE Des. Test Comput. 18(2): 42-52 (2001) - 2000
- [c4]Jim D. Garside, W. J. Bainbridge, Andrew Bardsley, David M. Clark, David A. Edwards, Stephen B. Furber, David W. Lloyd, Siamak Mohammadi, J. S. Pepper, Steve Temple, John V. Woods, Jianwei Liu, O. Petli:
AMULET3i - An Asynchronous System-on-Chip. ASYNC 2000: 162-175
1990 – 1999
- 1999
- [j3]Stephen B. Furber, James Garside, Peter A. Riocreux, Steve Temple, Paul Day, Jianwei Liu, Nigel C. Paver:
AMULET2e: an asynchronous embedded controller. Proc. IEEE 87(2): 243-256 (1999) - 1998
- [j2]Stephen B. Furber, Jim D. Garside, Steve Temple, Paul Day, Nigel C. Paver:
Asynchronous Embedded Control. Integr. Comput. Aided Eng. 5(1): 57-68 (1998) - 1997
- [j1]John V. Woods, Paul Day, Stephen B. Furber, Jim D. Garside, N. C. Paver, Steve Temple:
AMULET1: A Asynchronous ARM Microprocessor. IEEE Trans. Computers 46(4): 385-398 (1997) - [c3]Stephen B. Furber, Jim D. Garside, Steve Temple, Jianwei Liu, Paul Day, N. C. Paver:
AMULET2e: An Asynchronous Embedded Controller. ASYNC 1997: 290- - 1996
- [c2]Jim D. Garside, Steve Temple, Rahul Mehra:
The AMULET2e cache system. ASYNC 1996: 208-217 - 1994
- [c1]Stephen B. Furber, Paul Day, Jim D. Garside, N. C. Paver, Steve Temple, John V. Woods:
The Design and Evaluation of an Asynchronous Microprocessor. ICCD 1994: 217-220
1980 – 1989
- 1986
- [b1]Andrew Hopper, Steve Temple, Robin Williamson:
Local area network design. International computer science series, Addison-Wesley 1986, ISBN 978-0-201-13797-2, pp. I-XI, 1-184
Coauthor Index
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