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ORCIDEmre Salman
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2020 – today
- 2024
[j28]Ivan Miketic
, Emre Salman:
PowerID: Using Supply-Side Impedances of Power Delivery Networks as Signatures for Consumer Electronics. IEEE Trans. Consumer Electron. 70(1): 378-388 (2024)- [c61]Prachi Shukla, Mohammadamin Hajikhodaverdian, Vasilis F. Pavlidis, Emre Salman, Ayse K. Coskun:
Energy-Efficient Dataflow Design for Monolithic 3D Systolic Arrays with Resistive RAM. IGSC 2024: 67-73 - [c60]Krithika Dhananjay, Vasilis F. Pavlidis, Ayse K. Coskun, Emre Salman:
Enhanced Detection of Thermal Covert Channel Attacks in Multicore Processors. ISQED 2024: 1-7 - [c59]Hosein Haghshenas, Emre Salman, Ryan Willing, Shahrzad Towfighian, Milutin Stanacevic:
A Triboelectric Nanogenerator Interface Circuit for Applied Force Sensing. MWSCAS 2024: 428-432 - [i2]Prachi Shukla, Vasilis F. Pavlidis, Emre Salman, Ayse K. Coskun:
A New Dataflow Implementation to Improve Energy Efficiency of Monolithic 3D Systolic Arrays. CoRR abs/2401.03585 (2024) - 2023
- [j27]Krithika Dhananjay, Emre Salman:
SEAL-RF: Secure Adiabatic Logic for Wirelessly Powered IoT Devices. IEEE Internet Things J. 10(2): 1112-1123 (2023) - [j26]Ivan Miketic, Krithika Dhananjay, Emre Salman:
Covert Channel Communication as an Emerging Security Threat in 2.5D/3D Integrated Systems. Sensors 23(4): 2081 (2023) - [j25]Prachi Shukla, Vasilis F. Pavlidis, Emre Salman, Ayse K. Coskun:
TREAD-M3D: Temperature-Aware DNN Accelerators for Monolithic 3-D Mobile Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 4350-4363 (2023) - [c58]Hosein Haghshenas, Mahmood Chahari, Emre Salman, Ryan Willing, Shahrzad Towfighian, Milutin Stanacevic:
Power Transfer Optimization for Triboelectric Nanogenerators. BioCAS 2023: 1-5 - [c57]Mallika Rathore, Peter A. Milder, Emre Salman:
Precision and Performance-Aware Voltage Scaling in DNN Accelerators. ACM Great Lakes Symposium on VLSI 2023: 237-242 - [c56]Ivan Miketic, Krithika Yethiraj, Emre Salman:
Information-Theoretic Perspective to Thermal Covert Channels. ISCAS 2023: 1-5 - [c55]Abrar Abdurrob, Emre Salman, Jack Lombardi:
Thermal Integrity of ReRAM-based Near-Memory Computing in 3D Integrated DNN Accelerators. SOCC 2023: 1-6 - 2022
- [j24]Krithika Dhananjay, Vasilis F. Pavlidis, Ayse K. Coskun, Emre Salman:
High Bandwidth Thermal Covert Channel in 3-D-Integrated Multicore Processors. IEEE Trans. Very Large Scale Integr. Syst. 30(11): 1654-1667 (2022) - [c54]Emre Salman:
Session details: Session 2B: Computer-Aided Design (CAD). ACM Great Lakes Symposium on VLSI 2022 - [c53]Manav Jain, Milutin Stanacevic, Ryan Willing, Sherry Towfighian, Emre Salman:
Wireless Power Transfer for Smart Knee Implants. ISCAS 2022: 1896-1900 - [i1]Prachi Shukla, Vasilis F. Pavlidis, Emre Salman, Ayse K. Coskun:
Temperature-Aware Monolithic 3D DNN Accelerators for Biomedical Applications. CoRR abs/2203.15874 (2022) - 2021
- [j23]Krithika Dhananjay, Prachi Shukla, Vasilis F. Pavlidis, Ayse K. Coskun, Emre Salman:
Monolithic 3D Integrated Circuits: Recent Trends and Future Prospects. IEEE Trans. Circuits Syst. II Express Briefs 68(3): 837-843 (2021) - [j22]Ivan Miketic, Emre Salman:
PhaseCamouflage: Leveraging Adiabatic Operation to Thwart Reverse Engineering. IEEE Trans. Very Large Scale Integr. Syst. 29(7): 1285-1296 (2021) - [c52]Prachi Shukla, Sean S. Nemtzow, Vasilis F. Pavlidis, Emre Salman, Ayse K. Coskun:
Temperature-Aware Optimization of Monolithic 3D Deep Neural Network Accelerators. ASP-DAC 2021: 709-714 - [c51]Zhiming Zhang, Ivan Miketic, Emre Salman, Qiaoyan Yu:
Assessing Correlation Power Analysis (CPA) Attack Resilience of Transistor-Level Logic Locking. ACM Great Lakes Symposium on VLSI 2021: 415-420 - [c50]Zhiming Zhang, Ivan Miketic, Emre Salman, Qiaoyan Yu:
Towards Enhancing Power-Analysis Attack Resilience for Logic Locking Techniques. ISVLSI 2021: 132-137 - [c49]Krithika Dhananjay, Emre Salman:
EQUAL: Efficient QUasi Adiabatic Logic for Enhanced Side-Channel Resistance. ISVLSI 2021: 332-337 - 2020
- [j21]Mallika Rathore, Peter A. Milder, Emre Salman:
Error Probability Models for Voltage-Scaled Multiply-Accumulate Units. IEEE Trans. Very Large Scale Integr. Syst. 28(7): 1665-1675 (2020) - [c48]Krithika Dhananjay, Emre Salman:
Special Session: Adiabatic Circuits for Energy-Efficient and Secure IoT Systems. ICCD 2020: 17-20 - [c47]Yongwan Park, Emre Salman:
High Efficiency Fully Integrated On-Chip Regulator for Wide-Range Output Current. ISCAS 2020: 1-5 - [c46]Berke Gungor, Melik Yazici, Emre Salman, Yasar Gurbuz:
Establishing a Covert Communication Channel in RF and mm-Wave Circuits. MWSCAS 2020: 1072-1075 - [c45]Ivan Miketic, Emre Salman:
Energy-Efficient Adiabatic Circuits Using Transistor-Level Monolithic 3D Integration. SoCC 2020: 191-194
2010 – 2019
- 2019
- [j20]Weicheng Liu, Can Sitik, Emre Salman, Baris Taskin, Savithri Sundareswaran, Benjamin Huang:
SLECTS: Slew-Driven Clock Tree Synthesis. IEEE Trans. Very Large Scale Integr. Syst. 27(4): 864-874 (2019) - [j19]Tutu Wan, Yasha Karimi, Milutin Stanacevic, Emre Salman:
AC Computing Methodology for RF-Powered IoT Devices. IEEE Trans. Very Large Scale Integr. Syst. 27(5): 1017-1028 (2019) - [c44]Can Sitik, Weicheng Liu, Baris Taskin, Emre Salman:
Low Voltage Clock Tree Synthesis with Local Gate Clusters. ACM Great Lakes Symposium on VLSI 2019: 99-104 - [c43]Prachi Shukla, Ayse K. Coskun, Vasilis F. Pavlidis, Emre Salman:
An Overview of Thermal Challenges and Opportunities for Monolithic 3D ICs. ACM Great Lakes Symposium on VLSI 2019: 439-444 - [c42]Yuanfei Huang, Tutu Wan, Emre Salman, Milutin Stanacevic:
Signal Shaping at Interface of Wireless Power Harvesting and AC Computational Logic. ISCAS 2019: 1-5 - [c41]Ivan Miketic, Emre Salman:
Power and Data Integrity in Monolithic 3D Integrated SIMON Core. ISCAS 2019: 1-5 - [c40]Tasnuva Noor, Emre Salman:
A Novel Glitch-Free Integrated Clock Gating Cell for High Reliability. ISCAS 2019: 1-5 - [c39]Manav Jain, Alwathiqbellah Ibrahim, Emre Salman, Milutin Stanacevic, Ryan Willing, Shahrzad Towfighian:
Frontend Electronic System for Triboelectric Harvester in a Smart Knee Implant. MWSCAS 2019: 386-389 - 2018
- [j18]Chen Yan, Emre Salman:
Mono3D: Open Source Cell Library for Monolithic 3-D Integrated Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(3): 1075-1085 (2018) - [j17]Chen Yan, Jaya Dofe, Scott Kontak, Qiaoyan Yu, Emre Salman:
Hardware-Efficient Logic Camouflaging for Monolithic 3-D ICs. IEEE Trans. Circuits Syst. II Express Briefs 65-II(6): 799-803 (2018) - [c38]Emre Salman, Milutin Stanacevic, Samir Ranjan Das, Petar M. Djuric:
Leveraging RF Power for Intelligent Tag Networks. ACM Great Lakes Symposium on VLSI 2018: 329-334 - [c37]Mallika Rathore, Emre Salman:
Error Probability Models to Facilitate Approximate Computing in TFET based Circuits. ISCAS 2018: 1-5 - [c36]Tutu Wan, Emre Salman:
Ultra Low Power SIMON Core for Lightweight Encryption. ISCAS 2018: 1-5 - 2017
- [j16]Tutu Wan, Yasha Karimi, Milutin Stanacevic, Emre Salman:
Perspective Paper - Can AC Computing Be an Alternative for Wirelessly Powered IoT Devices? IEEE Embed. Syst. Lett. 9(1): 13-16 (2017) - [j15]Chen Yan, Zhihua Gan, Emre Salman:
Package-embedded spiral inductor characterization with application to switching buck converters. Microelectron. J. 66: 41-47 (2017) - [j14]Hailang Wang, Emre Salman:
Closed-Form Expressions for I/O Simultaneous Switching Noise Revisited. IEEE Trans. Very Large Scale Integr. Syst. 25(2): 769-773 (2017) - [c35]Jaya Dofe, Zhiming Zhang, Qiaoyan Yu, Chen Yan, Emre Salman:
Impact of Power Distribution Network on Power Analysis Attacks in Three-Dimensional Integrated Circuits. ACM Great Lakes Symposium on VLSI 2017: 327-332 - [c34]Chen Yan, Emre Salman:
Routing Congestion Aware Cell Library Development for Monolithic 3D ICs. ICRC 2017: 1-4 - [c33]Tutu Wan, Yasha Karimi, Milutin Stanacevic, Emre Salman:
Energy efficient AC computing methodology for wirelessly powered IoT devices. ISCAS 2017: 1-4 - [c32]Chen Yan, Zhihua Gan, Emre Salman:
In-package spiral inductor characterization for high efficiency buck converters. ISCAS 2017: 1-4 - [c31]Chen Yan, Scott Kontak, Hailang Wang, Emre Salman:
Open source cell library Mono3D to develop large-scale monolithic 3D integrated circuits. ISCAS 2017: 1-4 - 2016
- [j13]Can Sitik, Weicheng Liu, Baris Taskin, Emre Salman:
Design Methodology for Voltage-Scaled Clock Distribution Networks. IEEE Trans. Very Large Scale Integr. Syst. 24(10): 3080-3093 (2016) - [c30]Jaya Dofe, Qiaoyan Yu, Hailang Wang, Emre Salman:
Hardware Security Threats and Potential Countermeasures in Emerging 3D ICs. ACM Great Lakes Symposium on VLSI 2016: 69-74 - [c29]Jaya Dofe, Chen Yan, Scott Kontak, Emre Salman, Qiaoyan Yu:
Transistor-level camouflaged logic locking method for monolithic 3D IC security. AsianHOST 2016: 1-6 - [c28]Yongwan Park, Emre Salman:
On-chip hybrid regulator topology for portable SoCs with near-threshold operation. ISCAS 2016: 786-789 - [c27]Tutu Wan, Emre Salman, Milutin Stanacevic:
A new circuit design framework for IoT devices: Charge-recycling with wireless power harvesting. ISCAS 2016: 2046-2049 - [c26]Weicheng Liu, Emre Salman, Can Sitik, Baris Taskin:
Exploiting useful skew in gated low voltage clock trees. ISCAS 2016: 2595-2598 - 2015
- [j12]Can Sitik, Emre Salman, Leo Filippini, Sung-Jun Yoon, Baris Taskin:
FinFET-Based Low-Swing Clocking. ACM J. Emerg. Technol. Comput. Syst. 12(2): 13:1-13:20 (2015) - [j11]Peirong Ji, Emre Salman:
Quantifying the effect of local interconnects on on-chip power distribution. Microelectron. J. 46(3): 258-264 (2015) - [j10]Zhihua Gan, Emre Salman, Milutin Stanacevic:
Figures-of-Merit to Evaluate the Significance of Switching Noise in Analog Circuits. IEEE Trans. Very Large Scale Integr. Syst. 23(12): 2945-2956 (2015) - [j9]Hailang Wang, Emre Salman:
Decoupling Capacitor Topologies for TSV-Based 3-D ICs With Power Gating. IEEE Trans. Very Large Scale Integr. Syst. 23(12): 2983-2991 (2015) - [c25]Weicheng Liu, Emre Salman, Can Sitik, Baris Taskin:
Clock Skew Scheduling in the Presence of Heavily Gated Clock Networks. ACM Great Lakes Symposium on VLSI 2015: 283-288 - [c24]Mallika Rathore, Weicheng Liu, Emre Salman, Can Sitik, Baris Taskin:
A Novel Static D-Flip-Flop Topology for Low Swing Clocking. ACM Great Lakes Symposium on VLSI 2015: 301-306 - [c23]Leo Filippini, Emre Salman, Baris Taskin:
A wirelessly powered system with charge recovery logic. ICCD 2015: 505-510 - [c22]Weicheng Liu, Emre Salman, Can Sitik, Baris Taskin:
Enhanced level shifter for multi-voltage operation. ISCAS 2015: 1442-1445 - [c21]Shiwei Fang, Emre Salman:
Low swing TSV signaling using novel level shifters with single supply voltage. ISCAS 2015: 1965-1968 - [c20]Hailang Wang, Emre Salman:
Enhancing system-wide power integrity in 3D ICs with power gating. ISQED 2015: 322-326 - [c19]Hailang Wang, Emre Salman:
Resource allocation methodology for through silicon vias and sleep transistors in 3D ICs. ISQED 2015: 528-532 - 2014
- [j8]Hailang Wang, Mohammad H. Asgari, Emre Salman:
Compact model to efficiently characterize TSV-to-transistor noise coupling in 3D ICs. Integr. 47(3): 296-306 (2014) - [c18]Can Sitik, Leo Filippini, Emre Salman, Baris Taskin:
High Performance Low Swing Clock Tree Synthesis with Custom D Flip-Flop Design. ISVLSI 2014: 498-503 - 2013
- [c17]Hailang Wang, Mohammad H. Asgari, Emre Salman:
Efficient characterization of TSV-to-transistor noise coupling in 3D ICs. ACM Great Lakes Symposium on VLSI 2013: 71-76 - [c16]Suhas M. Satheesh, Emre Salman:
Effect of TSV fabrication technology on power distribution in 3D ICs. ACM Great Lakes Symposium on VLSI 2013: 287-292 - [c15]Hailang Wang, Emre Salman:
Power gating topologies in TSV based 3D integrated circuits. ACM Great Lakes Symposium on VLSI 2013: 327-328 - 2012
- [j7]Suhas M. Satheesh, Emre Salman:
Power Distribution in TSV-Based 3-D Processor-Memory Stacks. IEEE J. Emerg. Sel. Topics Circuits Syst. 2(4): 692-703 (2012) - [j6]Emre Salman, Eby G. Friedman:
Utilizing interdependent timing constraints to enhance robustness in synchronous circuits. Microelectron. J. 43(2): 119-127 (2012) - [c14]Zhihua Gan, Emre Salman, Milutin Stanacevic:
Methodology to determine dominant noise source in a system-on-chip based implantable device. SoCC 2012: 115-119 - [c13]Suhas M. Satheesh, Emre Salman:
Design space exploration for robust power delivery in TSV based 3-D systems-on-chip. SoCC 2012: 307-311 - 2011
- [j5]Selçuk Köse, Emre Salman, Eby G. Friedman:
Shielding Methodologies in the Presence of Power/Ground Noise. IEEE Trans. Very Large Scale Integr. Syst. 19(8): 1458-1468 (2011) - [c12]Emre Salman:
Noise coupling due to through silicon vias (TSVs) in 3-D integrated circuits. ISCAS 2011: 1411-1414 - 2010
- [c11]Emre Salman, Eby G. Friedman:
Methodology to achieve higher tolerance to delay variations in synchronous circuits. ACM Great Lakes Symposium on VLSI 2010: 447-452 - [c10]Renatas Jakushokas, Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin, Cynthia L. Recker:
Compact substrate models for efficient noise coupling and signal isolation analysis. ISCAS 2010: 2346-2349
2000 – 2009
- 2009
- [j4]Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin:
Worst Case Power/Ground Noise Estimation Using an Equivalent Transition Time for Resonance. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(5): 997-1004 (2009) - [j3]Emre Salman, Renatas Jakushokas, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin:
Methodology for Efficient Substrate Noise Analysis in Large-Scale Mixed-Signal Circuits. IEEE Trans. Very Large Scale Integr. Syst. 17(10): 1405-1418 (2009) - [j2]Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin:
Identification of Dominant Noise Source and Parameter Sensitivity for Substrate Coupling. IEEE Trans. Very Large Scale Integr. Syst. 17(10): 1559-1564 (2009) - [c9]Emre Salman, Renatas Jakushokas, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin:
Contact merging algorithm for efficient substrate noise analysis in large scale circuits. ACM Great Lakes Symposium on VLSI 2009: 9-14 - [c8]Selçuk Köse, Emre Salman, Eby G. Friedman:
Shielding Methodologies in the Presence of Power/Ground Noise. ISCAS 2009: 2277-2280 - 2008
- [c7]Emre Salman, Renatas Jakushokas, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin:
Input port reduction for efficient substrate extraction in large scale IC's. ISCAS 2008: 376-379 - [c6]Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin:
Equivalent rise time for resonance in power/ground noise estimation. ISCAS 2008: 2422-2425 - [c5]Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin:
Dominant Substrate Noise Coupling Mechanism for Multiple Switching Gates. ISQED 2008: 261-266 - [c4]Selçuk Köse, Emre Salman, Zeljko Ignjatovic, Eby G. Friedman:
Pseudo-random clocking to enhance signal integrity. SoCC 2008: 47-50 - 2007
- [j1]Emre Salman, Ali Dasdan, Feroze Taraporevala, Kayhan Küçükçakar, Eby G. Friedman:
Exploiting Setup-Hold-Time Interdependence in Static Timing Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(6): 1114-1125 (2007) - [c3]Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin:
Substrate Noise Reduction Based On Noise Aware Cell Design. ISCAS 2007: 3227-3230 - 2006
- [c2]Emre Salman, Eby G. Friedman, Ali Dasdan, Feroze Taraporevala, Kayhan Küçükçakar:
Pessimism Reduction In Static Timing Analysis Using Interdependent Setup and Hold Times. ISQED 2006: 159-164 - [c1]Emre Salman, Eby G. Friedman, Radu M. Secareanu:
Substrate and Ground Noise Interactions in Mixed-Signal Circuits. SoCC 2006: 293-296
Coauthor Index
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