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2020 – today
- 2022
[j2]Katsushige Matsubara
, Hanno Lieske, Motoki Kimura, Atsushi Nakamura, Manabu Koike, Shun Morikawa, Yoshihiko Hotta, Takahiro Irita, Seiji Mochizuki, Hiroyuki Hamasaki, Tatsuya Kamei:
A 12-nm Autonomous Driving Processor With 60.4 TOPS, 13.8 TOPS/W CNN Executed by Task-Separated ASIL D Control. IEEE J. Solid State Circuits 57(1): 115-126 (2022)- 2021
- [c10]Katsushige Matsubara, Hanno Lieske, Motoki Kimura, Atsushi Nakamura, Manabu Koike, Kazuaki Terashima, Shun Morikawa, Yoshihiko Hotta, Takahiro Irita, Seiji Mochizuki, Hiroyuki Hamasaki, Tatsuya Kamei:
4.2 A 12nm Autonomous-Driving Processor with 60.4TOPS, 13.8TOPS/W CNN Executed by Task-Separated ASIL D Control. ISSCC 2021: 56-58
2010 – 2019
- 2012
- [c9]Hanno Lieske, Shorin Kyo, Shouhei Nomoto, Sunao Torii, Yuki Kobayashi, Yasuyuki Ninomiya, Shin'ichiro Okazaki:
Efficient data transfer operations for a SIMD processor array system. ICASSP 2012: 1625-1628
2000 – 2009
- 2009
- [c8]Shorin Kyo, Shouhei Nomoto, Takuya Koga, Hanno Lieske, Shin'ichiro Okazaki:
IMAPCAR2: A dynamic SIMD/MIMD mode switching processor for embedded systems. Hot Chips Symposium 2009: 1-33 - 2007
- [c7]Shorin Kyo, Takuya Koga, Hanno Lieske, Shouhei Nomoto, Shin'ichiro Okazaki:
A low-cost mixed-mode parallel processor architecture for embedded systems. ICS 2007: 253-262 - 2003
- [c6]Stefan Langemeyer, Helge Kloos, Christian Simon-Klar, Lars Friebe, Willm Hinrichs, Hanno Lieske, Peter Pirsch:
A compact and flexible multi-DSP system for real-time SAR applications. IGARSS 2003: 1657-1659 - 2002
- [c5]Helge Kloos, Jens Peter Wittenburg, Willm Hinrichs, Hanno Lieske, Lars Friebe, C. Klar, Peter Pirsch:
HiPAR-DSP 16, a scalable highly parallel DSP core for system on a chip video- and image processing applications. ICASSP 2002: 3112-3115 - [c4]Christian Simon-Klar, Lars Friebe, Helge Kloos, Hanno Lieske, Willm Hinrichs, Peter Pirsch:
A multi DSP board for real time SAR processing using the HiPAR-DSP 16. IGARSS 2002: 2750-2752 - 2000
- [j1]Willm Hinrichs, Jens Peter Wittenburg, Hanno Lieske, Helge Kloos, Martin Ohmacht, Peter Pirsch:
A 1.3-GOPS parallel DSP for high-performance image-processing applications. IEEE J. Solid State Circuits 35(7): 946-952 (2000)
1990 – 1999
- 1999
- [c3]Jens Peter Wittenburg, Willm Hinrichs, Martin Ohmacht, Hanno Lieske, Helge Kloos, Peter Pirsch:
HiPAR-DSP: Ein 1.3 GOPS Multimedia Signalprozessor. ARCS 1999: 15-21 - 1998
- [c2]Jens Peter Wittenburg, Willm Hinrichs, Johannes Kneip, Martin Ohmacht, Mladen Berekovic, Hanno Lieske, Helge Kloos, Peter Pirsch:
Realization of a Programmable Parallel DSP for High Performance Image Processing Applications. DAC 1998: 56-61 - [c1]Kouhei Nadehara, Hanno Lieske, Ichiro Kuroda:
Software MPEG-2 video decoder on a 200-MHz, low-power multimedia microprocessor. ICASSP 1998: 3141-3144
Coauthor Index
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