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2020 – today
- 2024
[c19]Kshitiz Jain, Aditya Bansal, Krithika Rangarajan, Chetan Arora:
MMBCD: Multimodal Breast Cancer Detection from Mammograms with Clinical History. MICCAI (1) 2024: 144-154- [c18]Aditya Bansal, Michael Yuhas, Arvind Easwaran:
Compressing VAE-Based Out-of-Distribution Detectors for Embedded Deployment. RTCSA 2024: 37-42 - [i1]Aditya Bansal, Michael Yuhas, Arvind Easwaran:
Compressing VAE-Based Out-of-Distribution Detectors for Embedded Deployment. CoRR abs/2409.00880 (2024) - 2021
- [j6]Marichi Gupta, Aditya Bansal, Bhav Jain
, Jillian Rochelle, Atharv Oak, Mohammad S. Jalali:
Whether the weather will help us weather the COVID-19 pandemic: Using machine learning to measure twitter users' perceptions. Int. J. Medical Informatics 145: 104340 (2021)
2010 – 2019
- 2016
- [c17]Aditya Bansal, Mani Bhushan, Lorenz T. Biegler:
Covariance computation in MHE: A nonlinear regression approach. ICCA 2016: 663-668 - 2014
- [j5]James D. Warnock, Yuen H. Chan, Hubert Harrer, Sean M. Carey, Gerard Salem, Doug Malone, Ruchir Puri, Jeffrey A. Zitz, Adam Jatkowski, Gerald Strevig, Ayan Datta, Anne Gattiker, Aditya Bansal, Guenter Mayer, Yiu-Hing Chan, Mark D. Mayo, David L. Rude, Leon J. Sigal, Thomas Strach, Howard H. Smith, Huajun Wen, Pak-kin Mak, Chung-Lung Kevin Shum, Donald W. Plass, Charles F. Webb:
Circuit and Physical Design of the zEnterprise™ EC12 Microprocessor Chips and Multi-Chip Module. IEEE J. Solid State Circuits 49(1): 9-18 (2014) - 2013
- [c16]James D. Warnock, Yuen H. Chan, Hubert Harrer, David L. Rude, Ruchir Puri, Sean M. Carey, Gerard Salem, Guenter Mayer, Yiu-Hing Chan, Mark D. Mayo, Adam Jatkowski, Gerald Strevig, Leon J. Sigal, Ayan Datta, Anne Gattiker, Aditya Bansal, Doug Malone, Thomas Strach, Huajun Wen, Pak-kin Mak, Chung-Lung Kevin Shum, Donald W. Plass, Charles F. Webb:
5.5GHz system z microprocessor and multi-chip module. ISSCC 2013: 46-47 - 2012
- [c15]Amith Singhee, Emrah Acar, Mohammad Imran Younus, Rama N. Singh, Aditya Bansal:
DRC-free high density layout exploration with layout morphing and patterning quality assessment, with application to SRAM. ISQED 2012: 470-476 - 2011
- [p1]Aditya Bansal, Rahul M. Rao:
Variations: Sources and Characterization. Low-Power Variation-Tolerant Design in Nanometer Silicon 2011: 3-39
2000 – 2009
- 2009
- [j4]Aditya Bansal, Rahul M. Rao, Jae-Joon Kim, Sufi Zafar, James H. Stathis, Ching-Te Chuang:
Impacts of NBTI and PBTI on SRAM static/dynamic noise margins and cell failure probability. Microelectron. Reliab. 49(6): 642-649 (2009) - [c14]Aditya Bansal, Rama N. Singh, Rouwaida Kanj, Saibal Mukhopadhyay, Jin-Fuw Lee, Emrah Acar, Amith Singhee, Keunwoo Kim, Ching-Te Chuang, Sani R. Nassif, Fook-Luen Heng, Koushik K. Das:
Yield estimation of SRAM circuits using "Virtual SRAM Fab". ICCAD 2009: 631-636 - 2008
- [j3]Jing Li, Aditya Bansal, Swaroop Ghosh, Kaushik Roy:
An alternate design paradigm for low-power, low-cost, testable hybrid systems using scaled LTPS TFTs. ACM J. Emerg. Technol. Comput. Syst. 4(3): 13:1-13:19 (2008) - [c13]Aditya Bansal, Rama N. Singh, Saibal Mukhopadhyay, Geng Han, Fook-Luen Heng, Ching-Te Chuang:
Pre-Si estimation and compensation of SRAM layout deficiencies to achieve target performance and yield. ICCD 2008: 457-462 - [c12]Aditya Bansal, Jae-Joon Kim, Keunwoo Kim, Saibal Mukhopadhyay, Ching-Te Chuang, Kaushik Roy:
Optimal Dual-VT Design in Sub-100 Nanometer PDSOI and Double-Gate Technologies. VLSI Design 2008: 125-130 - 2007
- [j2]Jung Hwan Choi, Aditya Bansal, Mesut Meterelliyoz, Jayathi Murthy, Kaushik Roy:
Self-Consistent Approach to Leakage Power and Temperature Estimation to Predict Thermal Runaway in FinFET Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(11): 2059-2068 (2007) - [c11]Dheepa Lekshmanan, Aditya Bansal, Kaushik Roy:
FinFET SRAM: Optimizing Silicon Fin Thickness and Fin Ratio to Improve Stability at iso Area. CICC 2007: 623-626 - [c10]Jing Li, Kunhyuk Kang, Aditya Bansal, Kaushik Roy:
High Performance and Low Power Electronics on Flexible Substrate. DAC 2007: 274-275 - 2006
- [j1]Aditya Bansal, Bipul Chandra Paul, Kaushik Roy:
An Analytical Fringe Capacitance Model for Interconnects Using Conformal Mapping. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(12): 2765-2774 (2006) - [c9]Aditya Bansal, Mesut Meterelliyoz, Siddharth Singh, Jung Hwan Choi, Jayathi Murthy, Kaushik Roy:
Compact thermal models for estimation of temperature-dependent power/performance in FinFET technology. ASP-DAC 2006: 237-242 - [c8]Mark M. Budnik, Arijit Raychowdhury, Aditya Bansal, Kaushik Roy:
A high density, carbon nanotube capacitor for decoupling applications. DAC 2006: 935-938 - [c7]Qikai Chen, Saibal Mukhopadhyay, Aditya Bansal, Kaushik Roy:
Circuit-aware device design methodology for nanometer technologies: a case study for low power SRAM design. DATE 2006: 983-988 - [c6]Jung Hwan Choi, Aditya Bansal, Mesut Meterelliyoz, Jayathi Murthy, Kaushik Roy:
Leakage power dependent temperature estimation to predict thermal runaway in FinFET circuits. ICCAD 2006: 583-586 - [c5]Kaushik Roy, Hamid Mahmoodi-Meimand, Saibal Mukhopadhyay, Hari Ananthan, Aditya Bansal, Tamer Cakici:
Double-Gate SOI Devices for Low-Power and High-Performance Applications. VLSI Design 2006: 445-452 - 2005
- [c4]Aditya Bansal, Saibal Mukhopadhyay, Kairshik Roy:
Modeling and optimization approach to robust and low-power FinFET SRAM design in nanoscale era. CICC 2005: 835-838 - [c3]Kaushik Roy, Hamid Mahmoodi-Meimand, Saibal Mukhopadhyay, Hari Ananthan, Aditya Bansal, Tamer Cakici:
Double-gate SOI devices for low-power and high-performance applications. ICCAD 2005: 217-224 - [c2]Aditya Bansal, Kaushik Roy:
Asymmetric halo CMOSFET to reduce static power dissipation with improved performance. ISCAS (1) 2005: 1-4 - 2004
- [c1]Hari Ananthan, Aditya Bansal, Kaushik Roy:
FinFET SRAM - Device and Circuit Design Considerations. ISQED 2004: 511-516
Coauthor Index
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