"Study of 64-bit booth asynchronous multiplier based on FPGA."

Xiaoqing Liu et al. (2017)

> Home

Details and statistics

DOI: 10.1109/ASICON.2017.8252463

access: closed

type: Conference or Workshop Paper

metadata version: 2018-01-17

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/asicon/LiuHLFZ17
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/asicon/LiuHLFZ17
Xiaoqing Liu, Anping He, Caihong Li, Guangbo Feng, Jilin Zhang:
Study of 64-bit booth asynchronous multiplier based on FPGA. ASICON 2017: 263-266

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.