"A Method of Generating Tests for Marginal Delays an Delay Faults in ..."

Hiroshi Takahashi et al. (1997)

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DOI: 10.1109/ATS.1997.643977

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Hiroshi Takahashi, Kwame Osei Boateng, Yuzo Takamatsu, Toshiyuki Matsunaga:
A Method of Generating Tests for Marginal Delays an Delay Faults in Combinational Circuits. Asian Test Symposium 1997: 320-325

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