"Timing optimization of FPGA placements by logic replication."

Giancarlo Beraudo, John Lillis (2003)

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DOI: 10.1145/775832.775885

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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Giancarlo Beraudo, John Lillis:
Timing optimization of FPGA placements by logic replication. DAC 2003: 196-201

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