"Predictable Memory-CPU Co-Scheduling with Support for Latency-Sensitive Tasks."

Daniel Casini et al. (2020)

> Home

Details and statistics

DOI: 10.1109/DAC18072.2020.9218640

access: closed

type: Conference or Workshop Paper

metadata version: 2024-05-07

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/dac/CasiniPBNB20
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/dac/CasiniPBNB20
Daniel Casini, Paolo Pazzaglia, Alessandro Biondi, Marco Di Natale, Giorgio C. Buttazzo:
Predictable Memory-CPU Co-Scheduling with Support for Latency-Sensitive Tasks. DAC 2020: 1-6

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.