"Ultra Fine-Grained Run-Time Power Gating of On-chip Routers for CMPs."

Hiroki Matsutani et al. (2010)

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DOI: 10.1109/NOCS.2010.16

access: closed

type: Conference or Workshop Paper

metadata version: 2024-03-22

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Hiroki Matsutani, Michihiro Koibuchi, Daisuke Ikebuchi, Kimiyoshi Usami, Hiroshi Nakamura, Hideharu Amano:
Ultra Fine-Grained Run-Time Power Gating of On-chip Routers for CMPs. NOCS 2010: 61-68

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