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"A systematic approach to synthesis of verification test-suites for modular ..."

Sudhakar Surendran, Rubin A. Parekhji, R. Govindarajan (2008)

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DOI: 10.1109/SOCC.2008.4641486

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-23

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  - conf/socc/SurendranPG08
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Sudhakar Surendran, Rubin A. Parekhji, R. Govindarajan:
A systematic approach to synthesis of verification test-suites for modular SoC designs. SoCC 2008: 91-96

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