"Test method and scheme for low-power validation in modern SOC integrated ..."

Bonita Bhaskaran et al. (2016)

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DOI: 10.1109/VTS.2016.7477310

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  - conf/vts/BhaskaranSNAL16
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  persistent URL:
  - https://dblp.org/rec/conf/vts/BhaskaranSNAL16
Bonita Bhaskaran, Amit Sanghani, Kaushik Narayanun, Ayub Abdollahian, Amit Laknaur:
Test method and scheme for low-power validation in modern SOC integrated circuits. VTS 2016: 1-6

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