"An embedded DRAM with a 143-MHz SRAM interface using a sense-synchronized ..."

Yasuhiko Taito et al. (2003)

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DOI: 10.1109/JSSC.2003.818142

access: closed

type: Journal Article

metadata version: 2022-04-20

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Yasuhiko Taito, Tetsushi Tanizaki, Mitsuya Kinoshita, Futoshi Igaue, Takeshi Fujino, Kazutami Arimoto:
An embedded DRAM with a 143-MHz SRAM interface using a sense-synchronized read/write. IEEE J. Solid State Circuits 38(11): 1967-1973 (2003)

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