"Timing verification of asynchronous sequential circuits with ..."

Atsushi Ohnishi, Yuji Sugiyama, Takuji Okamoto (1996)

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DOI: 10.1002/SCJ.4690271105

access: closed

type: Journal Article

metadata version: 2023-09-13

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Atsushi Ohnishi, Yuji Sugiyama, Takuji Okamoto:
Timing verification of asynchronous sequential circuits with specifications - A method of reducing state transitions to be verified in detail. Syst. Comput. Jpn. 27(11): 53-63 (1996)

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