default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDPACT 2005: Saint Louis, MO, USA
- 14th International Conference on Parallel Architectures and Compilation Techniques (PACT 2005), 17-21 September 2005, St. Louis, MO, USA. IEEE Computer Society 2005, ISBN 0-7695-2429-X
Introduction
- Message from the General Chair.
- Message from the Program Chair.
- Tutorials and Workshops.
- Committees.
- Reviewers.
Keynote Address
- Justin R. Rattner:
Multi-Core to the Masses. 3
Profiling
- Erez Perelman, Trishul M. Chilimbi, Brad Calder:
Variational Path Profiling. 7-16 - Sriraman Tallam, Rajiv Gupta
, Xiangyu Zhang:
Extended Whole Program Paths. 17-26 - Changpeng Fang, Steve Carr, Soner Önder, Zhenlin Wang:
Instruction Based Memory Distance Analysis and its Application. 27-37 - Hussam Mousa, Chandra Krintz:
HPS: Hybrid Profiling Support. 38-50
CMPs and Consistency
- John D. Davis, James Laudon, Kunle Olukotun:
Maximizing CMP Throughput with Mediocre Cores. 51-62 - Austen McDonald, JaeWoong Chung, Hassan Chafi, Chi Cao Minh, Brian D. Carlstrom, Lance Hammond, Christos Kozyrakis, Kunle Olukotun:
Characterization of TCC on Chip-Multiprocessors. 63-74 - Thomas F. Wenisch, Stephen Somogyi, Nikolaos Hardavellas, Jangwoo Kim, Chris Gniady, Anastassia Ailamaki, Babak Falsafi:
Store-Ordered Streaming of Shared Memory. 75-86
Dynamic Optimization (Track I)
- Weifeng Zhang, Brad Calder, Dean M. Tullsen:
An Event-Driven Multithreaded Dynamic Optimization Framework. 87-98 - Yonghong Song, Spiros Kalogeropulos, Partha Tirumalai:
Design and Implementation of a Compiler Framework for Helper Threading on Multi-core Processors. 99-109 - Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González, Oguz Ergin:
Compiler Directed Early Register Release. 110-122
Compiler Analysis A (Track II)
- Masayo Haneda, Peter M. W. Knijnenburg, Harry A. G. Wijshoff:
Automatic Selection of Compiler Options Using Non-parametric Inferential Statistics. 123-132 - Swarup Kumar Sahoo, Gagan Agrawal:
Data Centric Transformations on Non-Integer Iteration Spaces. 133-142 - Konstantinos Kyriakopoulos, Kleanthis Psarris:
Efficient Techniques for Advanced Data Dependence Analysis. 143-156
Keynote Address
- Guy L. Steele Jr.:
Parallel Programming and Parallel Abstractions in Fortress. 157
Compiling for Novel Architectures
- Alexandre E. Eichenberger, Kathryn M. O'Brien, Kevin O'Brien, Peng Wu, Tong Chen, Peter H. Oden, Daniel A. Prener, Janice C. Shepherd, Byoungro So, Zehra Sura, Amy Wang, Tao Zhang, Peng Zhao, Michael Gschwind:
Optimizing Compiler for the CELL Processor. 161-172 - Ben Wun, Jeremy Buhler, Patrick Crowley:
Exploiting Coarse-Grained Parallelism to Accelerate Protein Motif Finding with a Network Processor. 173-184 - Changhao Jiang, Marc Snir:
Automatic Tuning Matrix Multiplication Performance on Graphics Hardware. 185-196
VLIW and Performance Analysis
- Hongtao Zhong, Kevin Fan, Scott A. Mahlke, Michael S. Schlansker:
A Distributed Control Path Architecture for VLIW Processors. 197-206 - Enric Gibert, Jaume Abella, F. Jesús Sánchez, Xavier Vera, Antonio González:
Variable-Based Multi-module Data Caches for Clustered VLIW Processors. 207-217 - Nathan L. Binkert, Lisa R. Hsu, Ali G. Saidi, Ronald G. Dreslinski, Andrew L. Schultz, Steven K. Reinhardt:
Performance Analysis of System Overheads in TCP/IP Workloads. 218-230
Microarchitecture (Track I)
- Huiyang Zhou:
Dual-Core Execution: Building a Highly Scalable Single-Thread Instruction Window. 231-242 - Gabriel H. Loh:
A Simple Divide-and-Conquer Approach for Neural-Class Branch Prediction. 243-254 - Michael Behar, Avi Mendelson, Avinoam Kolodny:
Trace Cache Sampling Filter. 255-266
Compiler Analysis B (Track II)
- Wei-Yu Chen, Costin Iancu, Katherine A. Yelick:
Communication Optimizations for Fine-Grained UPC Applications. 267-278 - Costin Iancu, Parry Husbands, Paul Hargrove:
HUNTing the Overlap. 279-290 - Patrick Carribault, Albert Cohen, William Jalby:
Deep Jam: Conversion of Coarse-Grain Parallelism to Instruction-Level and Vector Parallelism for Irregular Applications. 291-302
Reliability and Fault Tolerance
- Andreas Moshovos, Alexandros Kostopoulos:
Memory State Compressors for Giga-Scale Checkpoint/Restore. 303-314 - M. Wasiur Rashid, Edwin J. Tan, Michael C. Huang, David H. Albonesi:
Exploiting Coarse-Grain Verification Parallelism for Power-Efficient Fault Tolerance. 315-328
Memory
- Lian Li, Lin Gao, Jingling Xue:
Memory Coloring: A Compiler Approach for Scratchpad Memory Management. 329-338 - Calin Cascaval, Evelyn Duesterwald, Peter F. Sweeney, Robert W. Wisniewski:
Multiple Page Size Modeling and Optimization. 339-349 - Ilya Ganusov, Martin Burtscher:
Future Execution: A Hardware Prefetching Technique for Chip Multiprocessors. 350-360
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2025-01-30 20:40 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
