default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID55th MICRO 2022: Chicago, IL, USA
- 55th IEEE/ACM International Symposium on Microarchitecture, MICRO 2022, Chicago, IL, USA, October 1-5, 2022. IEEE 2022, ISBN 978-1-6654-6272-3
- Rahul Bera
, Konstantinos Kanellopoulos, Shankar Balachandran, David Novo, Ataberk Olgun, Mohammad Sadrosadati, Onur Mutlu:
Hermes: Accelerating Long-Latency Load Requests via Perceptron-Based Off-Chip Load Prediction. 1-18 - Tanvir Ahmed Khan, Muhammed Ugur, Krishnendra Nathella, Dam Sunwoo, Heiner Litz, Daniel A. Jiménez, Baris Kasikci:
Whisper: Profile-Guided Branch Misprediction Elimination for Data Center Applications. 19-34 - Sihao Liu, Jian Weng, Dylan Kupsh, Atefeh Sohrabizadeh, Zhengrong Wang, Licheng Guo, Jiuyang Liu, Maxim Zhulin, Rishabh Mani, Lucheng Zhang, Jason Cong, Tony Nowatzki:
OverGen: Improving FPGA Usability through Domain-specific Overlay Generation. 35-56 - Yifan Hao, Yongwei Zhao, Chenxiao Liu, Zidong Du, Shuyao Cheng, Xiaqing Li, Xing Hu, Qi Guo, Zhiwei Xu, Tianshi Chen:
Cambricon-P: A Bitflow Architecture for Arbitrary Precision Computing. 57-72 - Evgeny Manzhosov, Adam Hastings, Meghna Pancholi, Ryan Piersma, Mohamed Tarek Ibn Ziad, Simha Sethumadhavan:
Revisiting Residue Codes for Modern Memories. 73-90 - Rachit Rajat, Yongqin Wang, Murali Annavaram:
PageORAM: An Efficient DRAM Page Aware ORAM Strategy. 91-107 - Anish Saxena, Gururaj Saileshwar, Prashant J. Nair, Moinuddin K. Qureshi:
AQUA: Scalable Rowhammer Mitigation by Quarantining Aggressor Rows at Runtime. 108-123 - Jianyu Jiang, Ji Qi, Tianxiang Shen, Xusheng Chen, Shixiong Zhao, Sen Wang, Li Chen, Gong Zhang, Xiapu Luo, Heming Cui:
CRONUS: Fault-isolated, Secure and High-performance Heterogeneous Computing for Trusted Execution Environment. 124-143 - Ipoom Jeong, Jiwon Lee, Myung Kuk Yoon, Won Woo Ro:
Reconstructing Out-of-Order Issue Queue. 144-161 - Logan Moody, Wei Qi, Abdolrasoul Sharifi, Layne Berry, Joey Rudek, Jayesh Gaur, Jeff Parkhurst, Sreenivas Subramoney, Kevin Skadron, Ashish Venkat:
Speculative Code Compaction: Eliminating Dead Code via Speculative Microcode Transformations. 162-180 - Tuan Ta, Khalid Al-Hawaj, Nick Cebry, Yanghui Ou, Eric Hall, Courtney Golden, Christopher Batten:
big.VLITTLE: On-Demand Data-Parallel Acceleration for Mobile Systems on Chip. 181-198 - Sawan Singh, Arthur Perais, Alexandra Jimborean, Alberto Ros:
Exploring Instruction Fusion Opportunities in General Purpose Processors. 199-212 - Diya Joseph, Juan L. Aragón, Joan-Manuel Parcerisa, Antonio González:
DTexL: Decoupled Raster Pipeline for Texture Locality. 213-227 - Sina Darabi, Mohammad Sadrosadati, Negar Akbarzadeh, Joël Lindegger, Mohammad Hosseini, Jisung Park, Juan Gómez-Luna, Onur Mutlu, Hamid Sarbazi-Azad:
Morpheus: Extending the Last Level Cache Capacity in GPU Systems Using Idle GPU Core Resources. 228-244 - Yida Zhang, Changhee Jung:
Featherweight Soft Error Resilience for GPUs. 245-262 - Mohammadreza Saed, Yuan-Hsi Chou, Lufei Liu, Tyler Nowicki, Tor M. Aamodt:
Vulkan-Sim: A GPU Architecture Simulator for Ray Tracing. 263-281 - Ziyu Ying, Shulin Zhao, Sandeepa Bhuyan, Cyan Subhra Mishra, Mahmut T. Kandemir, Chita R. Das:
Pushing Point Cloud Compression to the Edge. 282-299 - Srivatsan Krishnan, Zishen Wan, Kshitij Bhardwaj, Paul N. Whatmough, Aleksandra Faust, Sabrina M. Neuman, Gu-Yeon Wei, David Brooks, Vijay Janapa Reddi:
Automatic Domain-Specific SoC Design for Autonomous Unmanned Aerial Vehicles. 300-317 - Emily Ruppel, Milijana Surbatovich, Harsh Desai, Kiwan Maeng, Brandon Lucia:
An Architectural Charge Management Interface for Energy-Harvesting Systems. 318-335 - Xiuxian Guan, Zekai Sun, Shengliang Deng, Xusheng Chen, Shixiong Zhao, Zongyuan Zhang, Tianyang Duan, Yuexuan Wang, Chenshu Wu, Yong Cui, Libo Zhang, Yanjun Wu, Rui Wang, Heming Cui:
ROG: A High Performance and Robust Distributed Training System for Robotic IoT. 336-353 - Chen Zou, Andrew A. Chien:
ASSASIN: Architecture Support for Stream Computing to Accelerate Computational Storage. 354-368 - Chloe Alverti, Vasileios Karakostas, Nikhita Kunati, Georgios I. Goumas, Michael M. Swift:
DaxVM: Stressing the Limits of Memory as a File Interface. 369-387 - Jiho Kim, Seokwon Kang, Yongjun Park, John Kim:
Networked SSD: Flash Memory Interconnection Network for High-Bandwidth SSD. 388-403 - B. Pratheek, Neha Jawalkar, Arkaprava Basu:
Designing Virtual Memory System of MCM GPUs. 404-422 - Jiechen Zhao, Iris Uwizeyimana, Karthik Ganesan, Mark C. Jeffrey, Natalie Enright Jerger:
ALTOCUMULUS: Scalable Scheduling for Nanosecond-Scale Remote Procedure Calls. 423-440 - Mahmoud Khairy, Ahmad Alawneh, Aaron Barnes, Timothy G. Rogers:
SIMR: Single Instruction Multiple Request Processing for Energy-Efficient Data Center Microservices. 441-463 - Marina Vemmou, Albert Cho, Alexandros Daglis:
Patching up Network Data Leaks with Sweeper. 464-479 - Mohammad Alian, Siddharth Agarwal, Jongmin Shin, Neel Patel, Yifan Yuan, Daehoon Kim, Ren Wang, Nam Sung Kim:
IDIO: Network-Driven, Inbound Network Data Orchestration on Server Processors. 480-493 - Ashwin Prasad, Sampath Rajendra, Kaushik Rajan, R. Govindarajan, Uday Bondhugula:
Treebeard: An Optimizing Compiler for Decision Tree Based ML Inference. 494-511 - Wei Niu, Jiexiong Guan, Xipeng Shen, Yanzhi Wang, Gagan Agrawal, Bin Ren:
GCD2: A Globally Optimizing Compiler for Mapping DNNs to Mobile DSPs. 512-529 - Yuxuan Zhang, Tanvir Ahmed Khan, Gilles Pokam, Baris Kasikci, Heiner Litz, Joseph Devietti:
OCOLOS: Online COde Layout OptimizationS. 530-545 - Graham Gobieski, Souradip Ghosh, Marijn Heule, Todd C. Mowry, Tony Nowatzki, Nathan Beckmann, Brandon Lucia:
A programmable, energy-minimal dataflow compiler and architecture. 546-564 - Sonali Singh, Anup Sarma, Sen Lu, Abhronil Sengupta, Mahmut T. Kandemir, Emre Neftci, Vijaykrishnan Narayanan, Chita R. Das:
Skipper: Enabling efficient SNN training through activation-checkpointing and time-skipping. 565-581 - Renzo Andri, Beatrice Bussolino, Antonio Cipolletta, Lukas Cavigelli, Zhe Wang:
Going Further With Winograd Convolutions: Tap-Wise Quantization for Efficient Inference on 4x4 Tiles. 582-598 - Hongxiang Fan, Thomas Chau, Stylianos I. Venieris, Royson Lee, Alexandros Kouris, Wayne Luk, Nicholas D. Lane, Mohamed S. Abdelfattah:
Adaptable Butterfly Accelerator for Attention-based NNs via Hardware and Algorithm Co-design. 599-615 - Seongmin Hong, Seungjae Moon, Junsoo Kim, Sungjae Lee, Minsub Kim, Dongsoo Lee, Joo-Young Kim:
DFX: A Low-latency Multi-FPGA Appliance for Accelerating Transformer-based Text Generation. 616-630 - Chunlin Tian, Li Li, Zhan Shi, Jun Wang, Cheng-Zhong Xu:
HARMONY: Heterogeneity-Aware Hierarchical Management for Federated Learning System. 631-645 - Yanan Guo, Xin Xin, Youtao Zhang, Jun Yang:
Leaky Way: A Conflict-Based Cache Covert Channel Bypassing Set Associativity. 646-661 - Chenlu Miao, Kai Bu, Mengming Li, Shaowu Mao, Jianwei Jia:
SwiftDir: Secure Cache Coherence without Overprotection. 662-677 - Xin Wang, Daulet Talapkaliyev, Matthew Hicks, Xun Jian:
Self-Reinforcing Memoization for Cryptography Calculations in Secure Memory Systems. 678-692 - Xin Wang, Jagadish B. Kotra, Xun Jian:
Eager Memory Cryptography in Caches. 693-709 - Haiyu Mao, Mohammed Alser, Mohammad Sadrosadati, Can Firtina, Akanksha Baranwal, Damla Senol Cali, Aditya Manglik, Nour Almadhoun Alserr, Onur Mutlu:
GenPIP: In-Memory Acceleration of Genome Analysis via Tight Integration of Basecalling and Read Mapping. 710-726 - Wenqin Huangfu, Krishna T. Malladi, Andrew Chang, Yuan Xie:
BEACON: Scalable Near-Data-Processing Accelerators for Genome Analysis near Memory Pool with the CXL Support. 727-743 - Amir Yazdanbakhsh, Ashkan Moradifirouzabadi, Zheng Li, Mingu Kang:
Sparse Attention Acceleration with Synergistic In-Memory Pruning and On-Chip Recomputation. 744-762 - Han-Wen Hu, Wei-Chen Wang, Yuan-Hao Chang, Yung-Chun Lee, Bo-Rong Lin, Huai-Mu Wang, Yen-Po Lin, Yu-Ming Huang, Chong-Ying Lee, Tzu-Hsiang Su, Chih-Chang Hsieh, Chia-Ming Hu, Yi-Ting Lai, Chung Kuang Chen, Han-Sung Chen, Hsiang-Pang Li, Tei-Wei Kuo, Meng-Fan Chang, Keh-Chung Wang, Chun-Hsiung Hung, Chih-Yuan Lu:
ICE: An Intelligent Cognition Engine with 3D NAND-based In-Memory Computing for Vector Similarity Search Acceleration. 763-783 - Sébastien Ollivier, Stephen Longofono, Prayash Dutta, Jingtong Hu, Sanjukta Bhanja, Alex K. Jones:
CORUSCANT: Fast Efficient Processing-in-Racetrack Memories. 784-798 - Yiannakis Sazeides, Alex Gerber, Ron Gabor, Arkady Bramnik, George Papadimitriou, Dimitris Gizopoulos, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos, Karyofyllis Patsidis:
IDLD: Instantaneous Detection of Leakage and Duplication of Identifiers used for Register Renaming. 799-814 - Abdullah Giray Yaglikçi, Ataberk Olgun, Minesh Patel, Haocong Luo, Hasan Hassan, Lois Orosa, Oguz Ergin, Onur Mutlu:
HiRA: Hidden Row Activation for Reducing Refresh Latency of Off-the-Shelf DRAM Chips. 815-834 - Jawad Haj-Yahya, Haris Volos, Davide B. Bartolini, Georgia Antoniou, Jeremie S. Kim, Zhe Wang, Kleovoulos Kalaitzidis, Tom Rollet, Zhirui Chen, Ye Geng, Onur Mutlu, Yiannakis Sazeides:
AgileWatts: An Energy-Efficient CPU Core Idle-State Architecture for Latency-Sensitive Server Applications. 835-850 - Georgia Antoniou, Haris Volos, Davide B. Bartolini, Tom Rollet, Yiannakis Sazeides, Jawad Haj-Yahya:
AgilePkgC: An Agile System Idle State Architecture for Energy Proportional Datacenter Servers. 851-867 - Xueliang Li, Zhuobin Shi, Junyang Chen, Yepang Liu:
Realizing Emotional Interactions to Learn User Experience and Guide Energy Optimization for Mobile Architectures. 868-884 - Fei Gao, Georgios Tziantzioulis, David Wentzlaff:
FracDRAM: Fractional Values in Off-the-Shelf DRAM. 885-899 - João Dinis Ferreira, Gabriel Falcão, Juan Gómez-Luna, Mohammed Alser, Lois Orosa, Mohammad Sadrosadati, Jeremie S. Kim, Geraldo F. Oliveira, Taha Shahroodi, Anant Nori, Onur Mutlu:
pLUTo: Enabling Massively Parallel Computation in DRAM via Lookup Tables. 900-919 - Daichi Fujiki, Alireza Khadem, Scott A. Mahlke, Reetuparna Das:
Multi-Layer In-Memory Processing. 920-936 - Jisung Park, Roknoddin Azizi, Geraldo F. Oliveira, Mohammad Sadrosadati, Rakesh Nadig, David Novo, Juan Gómez-Luna, Myungsuk Kim, Onur Mutlu:
Flash-Cosmos: In-Flash Bulk Bitwise Operations Using Inherent Computation Capability of NAND Flash Memory. 937-955 - Georgios Vavouliotis, Gino Chacon, Lluc Alvarez, Paul V. Gratz, Daniel A. Jiménez, Marc Casas:
Page Size Aware Cache Prefetching. 956-974 - Agustín Navarro-Torres, Biswabandan Panda, Jesús Alastruey-Benedé, Pablo Ibáñez, Víctor Viñals Yúfera, Alberto Ros:
Berti: an Accurate Local-Delta Data Prefetcher. 975-991 - Gagandeep Panwar, Muhammad Laghari, David Bears, Yuqing Liu, Chandler Jearls, Esha Choukse, Kirk W. Cameron, Ali Raza Butt, Xun Jian:
Translation-optimized Memory Compression for Capacity. 992-1011 - Shizhi Jiang, Qiusong Yang, Yiwei Ci:
Merging Similar Patterns for Hardware Prefetching. 1012-1026 - Anbang Wu, Hezi Zhang, Gushu Li, Alireza Shabani, Yuan Xie, Yufei Ding:
AutoComm: A Framework for Enabling Efficient Communication in Distributed Quantum Programs. 1027-1041 - Sophia Fuhui Lin, Sara Sussman, Casey Duckering, Pranav S. Mundada, Jonathan M. Baker, Rohan S. Kumar, Andrew A. Houck, Frederic T. Chong:
Let Each Quantum Bit Choose Its Basis Gates. 1042-1058 - Satvik Maurya, Swamit S. Tannu:
COMPAQT: Compressed Waveform Memory Architecture for Scalable Qubit Control. 1059-1077 - Abtin Molavi, Amanda Xu, Martin Diges, Lauren Pick, Swamit S. Tannu, Aws Albarghouthi:
Qubit Mapping and Routing via MaxSAT. 1078-1091 - Kaitlin N. Smith, Gokul Subramanian Ravi, Jonathan M. Baker, Frederic T. Chong:
Scaling Superconducting Quantum Computers with Chiplet Architectures. 1092-1109 - Yasunari Suzuki, Takanori Sugiyama, Tomochika Arai, Wang Liao, Koji Inoue, Teruo Tanimoto:
Q3DE: A fault-tolerant quantum computer architecture for multi-bit burst errors by cosmic rays. 1110-1125 - Flavien Solt, Patrick Jattke, Kaveh Razavi:
RemembERR: Leveraging Microprocessor Errata for Design Testing and Validation. 1126-1143 - Hyun Ryong Lee, Daniel Sánchez:
Datamime: Generating Representative Benchmarks by Automatically Synthesizing Datasets. 1144-1159 - Saambhavi Baskaran, Mahmut Taylan Kandemir, Jack Sampson:
An architecture interface and offload model for low-overhead, near-data, distributed accelerators. 1160-1177 - Yinan Xu, Zihao Yu, Dan Tang, Guokai Chen, Lu Chen, Lingrui Gou, Yue Jin, Qianruo Li, Xin Li, Zuojun Li, Jiawei Lin, Tong Liu, Zhigang Liu, Jiazhan Tan, Huaqiang Wang, Huizhe Wang, Kaifan Wang, Chuanqi Zhang, Fawang Zhang, Linjuan Zhang, Zifei Zhang, Yangyang Zhao, Yaoyang Zhou, Yike Zhou, Jiangrui Zou, Ye Cai, Dandan Huan, Zusong Li, Jiye Zhao, Zihao Chen, Wei He, Qiyuan Quan, Xingwu Liu, Sa Wang, Kan Shi, Ninghui Sun, Yungang Bao:
Towards Developing High Performance RISC-V Processors Using Agile Methodology. 1178-1199 - Beomsik Park, Ranggi Hwang, Dongho Yoon, Yoonhyuk Choi, Minsoo Rhu:
DiVa: An Accelerator for Differentially Private Machine Learning. 1200-1217 - Samira Mirbagher Ajorpaz, Daniel Moghimi, Jeffrey Neal Collins, Gilles Pokam, Nael B. Abu-Ghazaleh, Dean M. Tullsen:
EVAX: Towards a Practical, Pro-active & Adaptive Architecture for High Performance & Security. 1218-1236 - Jongmin Kim, Gwangho Lee, Sangpyo Kim, Gina Sohn, Minsoo Rhu, John Kim, Jung Ho Ahn:
ARK: Fully Homomorphic Encryption Accelerator with Runtime Data Generation and Inter-Operation Key Reuse. 1237-1254 - Xijing Han, James Tuck, Amro Awad:
Horus: Persistent Security for Extended Persistence-Domain Memory Systems. 1255-1269 - Nishil Talati, Haojie Ye, Sanketh Vedula, Kuan-Yu Chen, Yuhan Chen, Daniel Liu, Yichao Yuan, David T. Blaauw, Alex M. Bronstein, Trevor N. Mudge, Ronald G. Dreslinski:
Mint: An Accelerator For Mining Temporal Motifs. 1270-1287 - Nimish Shah, Wannes Meert, Marian Verhelst:
DPU-v2: Energy-efficient execution of irregular directed acyclic graphs. 1288-1307 - Rui Wang, Shuibing He, Weixu Zong, Yongkun Li, Yinlong Xu:
XPGraph: XPline-Friendly Persistent Memory Graph Stores for Large-Scale Evolving Graphs. 1308-1325 - Qinggang Wang, Long Zheng, Ao Hu, Yu Huang, Pengcheng Yao, Chuangyi Gui, Xiaofei Liao, Hai Jin, Jingling Xue:
A Data-Centric Accelerator for High-Performance Hypergraph Processing. 1326-1341 - Xinyu Chen, Yao Chen, Feng Cheng, Hongshi Tan, Bingsheng He, Weng-Fai Wong:
ReGraph: Scaling Graph Processing on HBM-enabled FPGAs with Heterogeneous Pipelines. 1342-1358 - Hunjun Lee, Minseop Kim, Dongmoon Min, Joonsung Kim, Jongwon Back, Honam Yoo, Jong-Ho Lee, Jangwoo Kim:
3D-FPIM: An Extreme Energy-Efficient DNN Acceleration System Using 3D NAND Flash-Based In-Situ PIM Unit. 1359-1376 - Yannan Nellie Wu, Po-An Tsai, Angshuman Parashar, Vivienne Sze, Joel S. Emer:
Sparseloop: An Analytical Approach To Sparse Tensor Accelerator Modeling. 1377-1395 - Xuyi Cai, Ying Wang, Xiaohan Ma, Yinhe Han, Lei Zhang:
DeepBurning-SEG: Generating DNN Accelerators of Segment-Grained Pipeline Architecture. 1396-1413 - Cong Guo, Chen Zhang, Jingwen Leng, Zihan Liu, Fan Yang, Yunxin Liu, Minyi Guo, Yuhao Zhu:
ANT: Exploiting Adaptive Numerical Data Type for Low-bit Deep Neural Network Quantization. 1414-1433 - Gang Li, Weixiang Xu, Zhuoran Song, Naifeng Jing, Jian Cheng, Xiaoyao Liang:
Ristretto: An Atomized Processing Architecture for Sparsity-Condensed Stream Flow in CNN. 1434-1450
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-11-11 21:36 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
