default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID37th VTS 2019: Monterey, CA, USA
- 37th IEEE VLSI Test Symposium, VTS 2019, Monterey, CA, USA, April 23-25, 2019. IEEE 2019, ISBN 978-1-7281-1170-4
- Max M. Shulaker, Laurent Lebrun, Bozena Kaminska, Bernard Courtois:
Special Session (New Topic): Emerging Computing and Testing Techniques. 1-2 - Mengyun Liu, Fangming Ye, Xin Li, Krishnendu Chakrabarty
, Xinli Gu:
Board-Level Functional Fault Identification using Streaming Data. 1-6 - Miao Tony He, Jungmin Park, Adib Nahiyan, Apostol Vassilev, Yier Jin, Mark M. Tehranipoor:
RTL-PSC: Automated Power Side-Channel Leakage Assessment at Register-Transfer Level. 1-6 - Cheng Ban, Minshun Wu, Jiangtao Xu, Li Geng, Degang Chen:
An Accurate and Efficient Method for Eliminating the Requirement of Coherent Sampling in Multi-Tone Test. 1-6 - Aijiao Cui, Yan Yang, Gang Qu, Huawei Li:
A Secure and Low-overhead Active IC Metering Scheme. 1-6 - Ankit Shah, Raman Nayyar, Arani Sinha:
Silicon Proven Timing Signoff Methodology using Hazard-Free Robust Path Delay Tests. 1-6 - Hans Martin von Staudt, Amit Majumdar, Bill Taylor, Jennifer Kitchen:
Innovative Design for Test in State-of-the-Art Analog Systems. 1 - Abhishek Das, Nur A. Touba:
A Graph Theory Approach towards IJTAG Security via Controlled Scan Chain Isolation. 1-6 - Sourav Das, Fei Su, Sreejit Chakravarty:
A Comparative Study of Pre-bond TSV Test Methodologies. 1-6 - Yunjie Zhang, Liwei Zhou, Yiorgos Makris:
Hardware-based Real-time Workload Forensics via Frame-level TLB Profiling. 1-6 - Thomas Moon, Junfeng Guan, Haitham Hassanieh:
Online Millimeter Wave Phased Array Calibration Based on Channel Estimation. 1-6 - Tai Song, Huaguo Liang, Ying Sun, Zhengfeng Huang, Maoxiang Yi, Xiangsheng Fang, Aibin Yan:
Novel Application of Deep Learning for Adaptive Testing Based on Long Short-Term Memory. 1-6 - Jeff Rearick, Alfred L. Crouch, Hans Martin von Staudt:
Innovative Practices on IEEE 1687.xyz. 1 - Fangzhou Wang, Sandeep Gupta:
Automatic Test Pattern Generation for timing verification and delay testing of RSFQ circuits. 1-6 - Manoj Niraula, Vipul Patel, Prakash Gothoskar, Attila Mekis, Gary Evans, Xuezhe Zheng:
Special Session: Photonic IC Testing - Challenges and Opportunities. 1 - Wim Dobbelaere, Marco Restifo, Peter Sarson:
Innovative Practices on Automotive Test. 1 - Hassan Salmani, Tamzidul Hoque, Swarup Bhunia, Muhammad Yasin, Jeyavijayan (JV) Rajendran, Naghmeh Karimi:
Special Session: Countering IP Security threats in Supply chain. 1-9 - Ghada Sokar, Yassin Zakaria, Asmaa Rabie, Kareem Madkour, Ira Leventhal, Jochen Rivoir, Xinli Gu, Haralampos-G. D. Stratigopoulos:
IP Session on Machine Learning Applications in IC Test-Related Tasks. 1 - Ahmed M. Y. Ibrahim, Hans G. Kerkhoff, Abrar Ibrahim, Mona Safar, M. Watheq El-Kharashi:
Efficient Structured Scan Patterns Retargeting for Hierarchical IEEE 1687 Networks. 1-6 - Pavan Kumar Datla Jagannadha, Mahmut Yilmaz, Milind Sonawane, Sailendra Chadalavada, Shantanu Sarangi, Bonita Bhaskaran, Shashank Bajpai, Venkat Abilash Reddy Nerallapally, Jayesh Pandey, Sam Jiang:
Special Session: In-System-Test (IST) Architecture for NVIDIA Drive-AGX Platforms. 1-8 - Abdulrahman Alaql, Tamzidul Hoque, Domenic Forte, Swarup Bhunia:
Quality Obfuscation for Error-Tolerant and Adaptive Hardware IP Protection. 1-6 - Ghislain Takam Tchendjou, Emmanuel Simeu:
Defective Pixel Analysis for Image Sensor Online Diagnostic and Self-Healing. 1-6 - Renjian Pan, Zhaobo Zhang, Xin Li, Krishnendu Chakrabarty, Xinli Gu:
Black-Box Test-Coverage Analysis and Test-Cost Reduction Based on a Bayesian Network Model. 1-6 - Malav Shah, Subhadeep Ghosh, Scott Martin:
Special Session: A Quality and Reliability Driven DFT and DFR Strategy for Automotive and Industrial Markets. 1 - Jianwei Zhang, Sandeep K. Gupta, William G. J. Halfond:
A New Method for Software Test Data Generation Inspired by D-algorithm. 1-6 - Chenlei Fang, Qicheng Huang, Soumya Mittal, R. D. Shawn Blanton:
Diagnosis Outcome Preview through Learning. 1-6 - Matthew McGuire, Ümit Y. Ogras, Sule Ozev:
PCB Hardware Trojans: Attack Modes and Detection Strategies. 1-6 - Irith Pomeranz:
Test Compaction Under Bounded Transparent-Scan. 1-6 - Liting Yu, Xiaoxiao Wang:
ZeroScreen: A Novel Structure for IC Reliability Screening at Time-Zero. 1-6 - Tse-Wei Wu, Dong-Zhen Lee, Yu-Hao Huang, Mango C.-T. Chao, Kai-Chiang Wu, Shu-Yi Kao, Ying-Yen Chen, Po-Lin Chen, Mason Chern, Jih-Nung Lee:
Layout-Based Dual-Cell-Aware Tests. 1-6 - Abhishek Das, Nur A. Touba:
Layered-ECC: A Class of Double Error Correcting Codes for High Density Memory Systems. 1-6 - R. Iris Bahar, Ulya R. Karpuzcu, Sasa Misailovic:
Special Session: Does Approximation Make Testing Harder (or Easier)? 1-9 - Abhishek Koneru, Aida Todri-Sanial, Krishnendu Chakrabarty:
Reliable Power Delivery and Analysis of Power-Supply Noise During Testing in Monolithic 3D ICs. 1-6 - Ben Niewenhuis, Balaji Ravikumar, Zeye Liu, R. D. Shawn Blanton:
Path Delay Test of the Carnegie Mellon Logic Characterization Vehicle. 1-6 - Soowang Park, Sandeep K. Gupta:
Cache Design for Yield-per-Area Maximization: Switchable Spare Columns with Disabling (SSC-Disable). 1-6 - Elena-Ioana Vatajelu, Giorgio Di Natale, Lorena Anghel:
Special Session: Reliability of Hardware-Implemented Spiking Neural Networks (SNN). 1-8 - Amit Jakati, Manish Sharma, Joy Liao:
Innovative Practices on Software and Hardware based Silicon Debug/Fault Isolation. 1 - Iris Ma, Hui King Lau, Joseph A. Reynick, Yu Huang:
Innovative Practices on DFT for AI Chips. 1 - Georgios Volanis, Yichuan Lu, Sai Govinda Rao Nimmalapudi, Angelos Antonopoulos, Andrew Marshall, Yiorgos Makris:
Analog Performance Locking through Neural Network-Based Biasing. 1-6 - Milind Sonawane, Venkat Abilash Reddy Nerallapally, Alex Hsu, Shantanu Sarangi:
Hybrid Performance Modeling for Optimization of In-System-Structural-Test (ISST) Latency. 1-6 - Wen Li, Ying Wang, Huawei Li, Xiaowei Li:
Leveraging Memory PUFs and PIM-based encryption to secure edge deep learning systems. 1-6 - Hang Gao, Ganapati Bhat, Ümit Y. Ogras, Sule Ozev:
Optimized Stress Testing for Flexible Hybrid Electronics Designs. 1-6 - Jubayer Mahmod, Spencer K. Millican, Ujjwal Guin, Vishwani D. Agrawal:
Special Session: Delay Fault Testing - Present and Future. 1-10 - Irith Pomeranz, Vivek Chickermane, Srikanth Venkataraman:
Observation Point Placement for Improved Logic Diagnosis based on Large Sets of Candidate Faults. 1-6 - Alfred L. Crouch, Peter L. Levin, Jennifer Dworak, Lakshmi Ramakrishnan, Yuhe Xia, Chi Zhang, Daniel Engels, Gary Evans, Ping Gui, Scott McWilliams, Saurabh Gupta, Franco Stellari, Naigang Wang, Peilin Song:
Innovate Practices on CyberSecurity of Hardware Semiconductor Devices. 1 - Ahmed Wahba, Li-C. Wang, Zheng Zhang, Nik Sumikawa:
Wafer Pattern Recognition Using Tucker Decomposition. 1-6 - Peikun Wang, Amir Masoud Gharehbaghi, Masahiro Fujita:
An Incremental Automatic Test Pattern Generation Method for Multiple Stuck-at Faults. 1-6 - Zhanwei Zhong, Tom B. Wrigglesworth, Eugene M. Chow, Krishnendu Chakrabarty:
Test-Cost Reduction for 2.5D ICs Using Microspring Technology for Die Attachment and Rework. 1-6 - Wu-Tung Cheng, Grzegorz Mrugalski, Janusz Rajski, Maciej Trawka, Jerzy Tyszer:
On Cyclic Scan Integrity Tests for EDT-based Compression. 1-6 - Leon Li, Alex Orailoglu:
Shielding Logic Locking from Redundancy Attacks. 1-6 - Yusuke Asada, Takahiko Shimizu, Yuji Gendai, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Jiang-Lin Wei, Nene Kushita, Hirotaka Arai, Anna Kuwana, Takayuki Nakatani, Kazumi Hatayama, Haruo Kobayashi:
Innovative Test Practices in Japan. 1 - Barry John Muldrey, Suvadeep Banerjee, Abhijit Chatterjee:
Mixed Signal Design Validation Using Reinforcement Learning Guided Stimulus Generation for Behavior Discovery. 1-6 - Deepika Neethirajan, Constantinos Xanthopoulos, Kiruba S. Subramani, Keith Schaub, Ira Leventhal, Yiorgos Makris:
Machine Learning-based Noise Classification and Decomposition in RF Transceivers. 1-6 - S. Bandyopadhyay, J. Mekkoth, Marc Hutner, Hayk T. Grigoryan, Arun Kumar, Samvel K. Shoukourian, Grigor Tshagharyan, Yervant Zorian, Gabriele Boschi, Duccio Lazzarotti, Donato Luongo, Hanna Shaheen, Gurgen Harutyunyan:
Innovative Practices on In-System Test and Reliability of Memories. 1 - Saurabh Gupta, Bonita Bhaskaran, Shantanu Sarangi, Ayub Abdollahian, Jennifer Dworak:
A Novel Graph Coloring Based Solution for Low-Power Scan Shift. 1-6
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2025-02-15 00:27 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
