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ORCIDYukihide Tsuji
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2010 – 2019
- 2017
[j3]Makoto Miyamura, Toshitsugu Sakamoto, Xu Bai, Yukihide Tsuji
, Ayuka Morioka, Ryusuke Nebashi, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Hiromitsu Hada, Tadahiko Sugibayashi, Yuya Nagamatsu, Soichi Ookubo, Takuma Shirai, Fumihito Sugai, Masayuki Inaba:
NanoBridge-Based FPGA in High-Temperature Environments. IEEE Micro 37(5): 32-42 (2017)- 2016
- [c9]Yukihide Tsuji, Xu Bai, Ayuka Morioka, Makoto Miyamura, Ryusuke Nebashi, Toshitsugu Sakamoto, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Hiromitsu Hada, Tadahiko Sugibayashi:
A 2× logic density Programmable Logic array using atom switch fully implemented with logic transistors at 40nm-node and beyond. VLSI Circuits 2016: 1-2 - 2015
- [j2]Masanori Natsui, Daisuke Suzuki, Noboru Sakimura, Ryusuke Nebashi, Yukihide Tsuji, Ayuka Morioka, Tadahiko Sugibayashi, Sadahiko Miura, Hiroaki Honjo, Keizo Kinoshita, Shoji Ikeda, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu:
Nonvolatile Logic-in-Memory LSI Using Cycle-Based Power Gating and its Application to Motion-Vector Prediction. IEEE J. Solid State Circuits 50(2): 476-489 (2015) - [j1]Toshitsugu Sakamoto, Yukihide Tsuji, Munehiro Tada, Hideki Makiyama, Takumi Hasegawa, Yoshiki Yamamoto, Shinobu Okanishi, Keiichi Maekawa, Naoki Banno, Makoto Miyamura, Koichiro Okamoto, Noriyuki Iguchi, Hidekazu Oda, Shiro Kamohara, Yasushi Yamagata, Nobuyuki Sugii, Hiromitsu Hada, Yasuhiro Ogasahara:
A Silicon-on-Thin-Buried-Oxide CMOS Microcontroller with Embedded Atom-Switch ROM. IEEE Micro 35(6): 13-23 (2015) - [c8]Toshitsugu Sakamoto, Yukihide Tsuji, Munehiro Tada, Hideki Makiyama, Takumi Hasegawa, Yoshiki Yamamoto, Shinobu Okanishi, Keiichi Maekawa, Naoki Banno, Makoto Miyamura, Koichiro Okamoto, Noriyuki Iguchi, Yasuhiro Ogasahara, Hidekazu Oda, Shiro Kamohara, Yasushi Yamagata, Nobuyuki Sugii, Hiromitsu Hada:
0.39-V, 18.26-µW/MHz SOTB CMOS Microcontroller with embedded atom switch ROM. COOL Chips 2015: 1-3 - [c7]Makoto Miyamura, Toshitsugu Sakamoto, Yukihide Tsuji, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Hiromitsu Hada:
0.5-V Highly Power-Efficient Programmable Logic using Nonvolatile Configuration Switch in BEOL. FPGA 2015: 236-239 - [c6]Xu Bai, Yukihide Tsuji, Ayuka Morioka, Makoto Miyamura, Toshi Sakamoto, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Hiromitsu Hada:
Architecture of Reconfigurable-Logic Cell Array with Atom Switch: Cluster Size & Routing Fabrics (Abstract Only). FPGA 2015: 269 - [c5]Yukihide Tsuji, Xu Bai, Makoto Miyamura, Toshitsugu Sakamoto, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Nobuyuki Sugii, Hiromitsu Hada:
Sub-μW standby power, <18 μW/DMIPS@25MHz MCU with embedded atom-switch programmable logic and ROM. VLSIC 2015: 86- - 2014
- [c4]Ryusuke Nebashi, Noboru Sakimura, Hiroaki Honjo, Ayuka Morioka, Yukihide Tsuji, Kunihiko Ishihara, Keiichi Tokutome, Sadahiko Miura, Shunsuke Fukami, Keizo Kinoshita, Takahiro Hanyu, Tetsuo Endoh, Naoki Kasai, Hideo Ohno, Tadahiko Sugibayashi:
A delay circuit with 4-terminal magnetic-random-access-memory device for power-efficient time- domain signal processing. ISCAS 2014: 1588-1591 - [c3]Noboru Sakimura, Yukihide Tsuji, Ryusuke Nebashi, Hiroaki Honjo, Ayuka Morioka, Kunihiko Ishihara, Keizo Kinoshita, Shunsuke Fukami, Sadahiko Miura, Naoki Kasai, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu, Tadahiko Sugibayashi:
10.5 A 90nm 20MHz fully nonvolatile microcontroller for standby-power-critical applications. ISSCC 2014: 184-185 - 2013
- [c2]Masanori Natsui, Daisuke Suzuki, Noboru Sakimura, Ryusuke Nebashi, Yukihide Tsuji, Ayuka Morioka, Tadahiko Sugibayashi, Sadahiko Miura, Hiroaki Honjo, Keizo Kinoshita, Shoji Ikeda, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu:
Nonvolatile logic-in-memory array processor in 90nm MTJ/MOS achieving 75% leakage reduction using cycle-based power gating. ISSCC 2013: 194-195 - 2012
- [c1]Noboru Sakimura, Ryusuke Nebashi, Yukihide Tsuji, Hiroaki Honjo, Tadahiko Sugibayashi, Hiroki Koike, Takashi Ohsawa, Shunsuke Fukami, Takahiro Hanyu, Hideo Ohno, Tetsuo Endoh:
High-speed simulator including accurate MTJ models for spintronics integrated circuit design. ISCAS 2012: 1971-1974
Coauthor Index
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