default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDYuko Hara-Azumi
Yuko Hara
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
[j34]Naoki Nagamatsu, Kenshiro Ise, Yuko Hara
:
Mixed-Precision Neural Architecture Search and Dynamic Split Point Selection for Split Computing. IEEE Access 12: 137439-137454 (2024)- [j33]Mingyu Yang, Tanvir Ahmed, Saya Inagaki, Kazuo Sakiyama, Yang Li, Yuko Hara-Azumi:
Hardware/Software Cooperative Design Against Power Side-Channel Attacks on IoT Devices. IEEE Internet Things J. 11(9): 16758-16768 (2024) - [j32]Qingyu Zeng, Yuko Hara-Azumi:
Hardware/Software Codesign of Real-Time Intrusion Detection System for Internet of Things Devices. IEEE Internet Things J. 11(12): 22351-22363 (2024) - [c53]Kota Maejima, Takayuki Nishio, Asato Yamazaki, Yuko Hara-Azumi:
Tram-FL: Routing-based Model Training for Decentralized Federated Learning. CCNC 2024: 1038-1039 - [c52]Gento Hiruma, Mingyu Yang, Yang Li, Kazuo Sakiyama, Yuko Hara-Azumi:
High-Level Synthesis Countermeasure Using Threshold Implementation with Mixed Number of Shares. HEART 2024: 18-26 - [c51]Kaung Htet San, Toshiaki Kondo, Sanparith Marukatat, Yuko Hara-Azumi:
A Comparative Study of Loss Functions for Arbitrary-Oriented Object Detection in Aerial Images. JCSSE 2024: 22-27 - 2023
- [j31]Ryota Hira, Tomoaki Kitahara, Daiki Miyahara, Yuko Hara-Azumi, Yang Li, Kazuo Sakiyama:
Software Evaluation for Second Round Candidates in NIST Lightweight Cryptography. J. Inf. Process. 31: 205-219 (2023) - [j30]Saya Inagaki, Mingyu Yang, Yang Li, Kazuo Sakiyama, Yuko Hara-Azumi:
Power Side-channel Attack Resistant Circuit Designs of ARX Ciphers Using High-level Synthesis. ACM Trans. Embed. Comput. Syst. 22(5): 85:1-85:17 (2023) - [c50]Maki Tsukahara, Haruka Hirata, Mingyu Yang, Daiki Miyahara, Yang Li, Yuko Hara-Azumi, Kazuo Sakiyama:
On the Practical Dependency of Fresh Randomness in AES S-box with Second-Order TI. CANDARW 2023: 286-291 - [c49]Keigo Matsumoto, Yoshiaki Inoue, Yuko Hara-Azumi, Kazuki Maruta, Yu Nakayama, Daisuke Hisano:
Impact of Quantization Noise on CNN-based Joint Source-Channel Coding and Modulation. CCNC 2023: 465-468 - [c48]Asato Yamazaki, Takayuki Nishio, Yuko Hara-Azumi:
Convergence Improvement by Parameters Exchange in Asynchronous Decentralized Federated Learning for Non-IID Data. SEAA 2023: 36-43 - [c47]Saya Inagaki, Mingyu Yang, Yang Li, Kazuo Sakiyama, Yuko Hara-Azumi:
Power Side-channel Countermeasures for ARX Ciphers using High-level Synthesis. FPGA 2023: 52 - [c46]Naoki Nagamatsu, Yuko Hara-Azumi:
Dynamic Split Computing-Aware Mixed-Precision Quantization for Efficient Deep Edge Intelligence. TrustCom 2023: 2538-2545 - [c45]Keigo Matsumoto, Yoshiaki Inoue, Yuko Hara-Azumi, Kazuki Maruta, Yu Nakayama, Yoshinori Shinohara, Hiroki Ikeda, Daisuke Hisano:
Implementation of Deep Joint Source-Channel Coding on 5G Systems for Image Transmission. VTC Fall 2023: 1-5 - [i4]Kota Maejima, Takayuki Nishio, Asato Yamazaki, Yuko Hara-Azumi:
Tram-FL: Routing-based Model Training for Decentralized Federated Learning. CoRR abs/2308.04762 (2023) - 2022
- [j29]Mehdi Trabelsi Ajili, Yuko Hara-Azumi:
Multimodal Neural Network Acceleration on a Hybrid CPU-FPGA Architecture: A Case Study. IEEE Access 10: 9603-9617 (2022) - [j28]Yu Nakayama, Yukito Onodera, Anh Hoang Ngoc Nguyen, Yuko Hara-Azumi:
Real-Time Resource Allocation in Passive Optical Network for Energy-Efficient Inference at GPU-Based Network Edge. IEEE Internet Things J. 9(18): 17348-17358 (2022) - [j27]Christian Pilato, Zhenman Fang, Yuko Hara-Azumi, Jim Hwang:
Introduction to the Special Section on High-level Synthesis for FPGA: Next-generation Technologies and Applications. ACM Trans. Design Autom. Electr. Syst. 27(4): 29:1-29:2 (2022) - [c44]Yusuke Inuma, Yuko Hara-Azumi:
Hardware SAT Solver-based Area-efficient Accelerator for Autonomous Driving. FPT 2022: 1-4 - [c43]Shohei Fujimaki, Yoshiaki Inoue, Daisuke Hisano, Kazuki Maruta, Yu Nakayama, Yuko Hara-Azumi:
A Self-Attention Network for Deep JSCCM: The Design and FPGA Implementation. GLOBECOM 2022: 6390-6395 - [c42]Tomoaki Kitahara, Ryota Hira, Yuko Hara-Azumi, Daiki Miyahara, Yang Li, Kazuo Sakiyama:
Optimized Software Implementations of Ascon, Grain-128AEAD, and TinyJambu on ARM Cortex-M0. CANDARW 2022: 316-322 - [c41]Saya Inagaki, Mingyu Yang, Yang Li, Kazuo Sakiyama, Yuko Hara-Azumi:
Examining Vulnerability of HLS-designed Chaskey-12 Circuits to Power Side-Channel Attacks. ISQED 2022: 1 - [c40]Naoya Yokota, Yuko Hara-Azumi:
Gossip Swap SGD: Lightweight Decentralized Machine Learning for Non-Homogeneous Data Distribution. SoMeT 2022: 678-689 - [c39]Ayano Higuchi, Erina Takeshita, Daisuke Hisano, Yoshiaki Inoue, Kazuki Maruta, Takayuki Nishio, Yuko Hara-Azumi, Yu Nakayama:
Aquatic Fronthaul for Underwater-Ground Communication in 6G Mobile Communications. VTC Spring 2022: 1-6 - [c38]Erina Takeshita, Asahi Sakaguchi, Daisuke Hisano, Yoshiaki Inoue, Kazuki Maruta, Yuko Hara-Azumi, Yu Nakayama:
Stochastic Image Transmission with CoAP for Extreme Environments. VTC Spring 2022: 1-6 - [i3]Erina Takeshita, Asahi Sakaguchi, Daisuke Hisano, Yoshiaki Inoue, Kazuki Maruta, Yuko Hara-Azumi, Yu Nakayama:
Stochastic Image Transmission with CoAP for Extreme Environments. CoRR abs/2205.01852 (2022) - [i2]Ryota Hira, Tomoaki Kitahara, Daiki Miyahara, Yuko Hara-Azumi, Yang Li, Kazuo Sakiyama:
Software Evaluation for Second Round Candidates in NIST Lightweight Cryptography. IACR Cryptol. ePrint Arch. 2022: 591 (2022) - 2021
- [j26]Yu Nakayama, Ryo Yaegashi, Anh Hoang Ngoc Nguyen, Yuko Hara-Azumi:
Real-Time Reconfiguration of Time-Aware Shaper for ULL Transmission in Dynamic Conditions. IEEE Access 9: 115246-115255 (2021) - [c37]Rei Kudo, Takeshi Sugawara, Kazuo Sakiyama, Yuko Hara-Azumi, Yang Li:
Revisiting System Noise in Side-Channel Attacks: Mutual Assistant SCA vs. Genetic Algorithm. AsianHOST 2021: 1-6 - [c36]Hsuan Hsiao, Joshua San Miguel, Yuko Hara-Azumi, Jason Helge Anderson:
Zero Correlation Error: A Metric for Finite-Length Bitstream Independence in Stochastic Computing. ASP-DAC 2021: 260-265 - [c35]Anh Hoang Ngoc Nguyen, Yuko Hara-Azumi:
An FPGA-based Stochastic SAT Solver Leveraging Inter-Variable Dependencies. FPL 2021: 179-184 - [c34]Yoshiaki Inoue, Daisuke Hisano, Kazuki Maruta, Yuko Hara-Azumi, Yu Nakayama:
Deep Joint Source-Channel Coding and Modulation for Underwater Acoustic Communication. GLOBECOM 2021: 1-7 - [c33]Warnnaphorn Suksuganjana, Seksan Laitrakun, Krit Athikulwongse, Yuko Hara-Azumi, Somrudee Deepaisarn:
Improved Step Detection with Smartphone Handheld Mode Recognition. KST 2021: 55-60 - [c32]Kosuke Suzuoki, Daisuke Hisano, Kazuki Maruta, Yoshiaki Inoue, Yuko Hara-Azumi, Yu Nakayama:
Space- Time- Domain Adaptive Equalizer Employed Successive Interference Cancellation for Underwater Acoustic Communication. VTC Fall 2021: 1-5 - 2020
- [j25]Anh Hoang Ngoc Nguyen, Masashi Aono, Yuko Hara-Azumi:
FPGA-Based Hardware/Software Co-Design of a Bio-Inspired SAT Solver. IEEE Access 8: 49053-49065 (2020) - [j24]Mingyu Yang, Yuko Hara-Azumi:
Implementation of Lightweight eHealth Applications on a Low-Power Embedded Processor. IEEE Access 8: 121724-121732 (2020) - [j23]Paniti Achararit, Muhammad Abdullah Hanif, Rachmad Vidya Wicaksana Putra, Muhammad Shafique, Yuko Hara-Azumi:
APNAS: Accuracy-and-Performance-Aware Neural Architecture Search for Neural Hardware Accelerators. IEEE Access 8: 165319-165334 (2020) - [j22]Kaoru Saso, Yuko Hara-Azumi:
Revisiting Simple and Energy Efficient Embedded Processor Designs Toward the Edge Computing. IEEE Embed. Syst. Lett. 12(2): 45-49 (2020) - [j21]Naoki Takeuchi, Masashi Aono, Yuko Hara-Azumi, Christopher L. Ayala:
A Circuit-Level Amoeba-Inspired SAT Solver. IEEE Trans. Circuits Syst. II Express Briefs 67-II(10): 2139-2143 (2020) - [c31]Yu Nakayama, Yuko Hara-Azumi, Anh Hoang Ngoc Nguyen, Daisuke Hisano, Yoshiaki Inoue, Takayuki Nishio, Kazuki Maruta:
Real-Time Routing for Wireless Relay Fronthaul with Vehicle-Mounted Radio Units. VTC Spring 2020: 1-6
2010 – 2019
- 2019
- [j20]Sara Ayman Metwalli, Yuko Hara-Azumi:
SSA-AC: Static Significance Analysis for Approximate Computing. ACM Trans. Design Autom. Electr. Syst. 24(3): 34:1-34:17 (2019) - [j19]Hisashi Osawa, Yuko Hara-Azumi:
Approximate Data Reuse-based Accelerator Design for Embedded Processor. ACM Trans. Design Autom. Electr. Syst. 24(5): 56:1-56:25 (2019) - [c30]Anh Hoang Ngoc Nguyen, Masashi Aono, Yuko Hara-Azumi:
FPGA-Based amoeba-inspired SAT solver for cyber-physical systems. ICCPS 2019: 316-317 - [c29]Anh Hoang Ngoc Nguyen, Masashi Aono, Yuko Hara-Azumi:
Amoeba-Inspired Hardware SAT Solver with Effective Feedback Control. FPT 2019: 243-246 - [c28]Kenta Shirane, Takahiro Yamamoto, Ittetsu Taniguchi, Yuko Hara-Azumi, Shigeru Yamashita, Hiroyuki Tomiyama:
Maximum Error-Aware Design of Approximate Array Multipliers. ISOCC 2019: 73-74 - [c27]Kazuaki Hara, Naoki Takeuchi, Masashi Aono, Yuko Hara-Azumi:
Amoeba-Inspired Stochastic Hardware SAT Solver. ISQED 2019: 151-156 - 2018
- [c26]Kaoru Saso, Yuko Hara-Azumi:
Simple Instruction-Set Computer for Area and Energy-Sensitive IoT Edge Devices. ASAP 2018: 1-4 - [i1]Naoki Takeuchi, Masashi Aono, Yuko Hara-Azumi, Christopher L. Ayala:
A Circuit-Level Amoeba-Inspired SAT Solver. CoRR abs/1812.11792 (2018) - 2017
- [j18]Noriaki Sakamoto, Tanvir Ahmed, Jason Helge Anderson, Yuko Hara-Azumi:
Subleq⊝: An Area-Efficient Two-Instruction-Set Computer. IEEE Embed. Syst. Lett. 9(2): 33-36 (2017) - [j17]Takahiro Yamamoto, Ittetsu Taniguchi, Hiroyuki Tomiyama, Shigeru Yamashita, Yuko Hara-Azumi:
A Systematic Methodology for Design and Worst-Case Error Analysis of Approximate Array Multipliers. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(7): 1496-1499 (2017) - [c25]S. Alexander Chin, Noriaki Sakamoto, Allan Rui, Jim Zhao, Jin Hee Kim, Yuko Hara-Azumi, Jason Helge Anderson:
CGRA-ME: A unified framework for CGRA modelling and exploration. ASAP 2017: 184-189 - [c24]Hisashi Osawa, Yuko Hara-Azumi:
Approximate data reuse-based processor: a case study on image compression. ESTIMedia 2017: 32-40 - [c23]Minato Yokota, Kaoru Saso, Yuko Hara-Azumi:
One-instruction set computer-based multicore processors for energy-efficient streaming data processing. RSP 2017: 71-77 - 2016
- [c22]Takahiro Yamamoto, Ittetsu Taniguchi, Hiroyuki Tomiyama, Shigeru Yamashita, Yuko Hara-Azumi:
A systematic methodology for design and analysis of approximate array multipliers. APCCAS 2016: 352-354 - [c21]Jason Helge Anderson, Yuko Hara-Azumi, Shigeru Yamashita:
Effect of LFSR seeding, scrambling and feedback polynomial on stochastic computing accuracy. DATE 2016: 1550-1555 - 2015
- [c20]Tanvir Ahmed, Yuko Hara-Azumi:
Timing speculation-aware instruction set extension for resource-constrained embedded systems. ASAP 2015: 30-34 - [c19]Stefan Hadjis, Andrew Canis, Ryoya Sobue, Yuko Hara-Azumi, Hiroyuki Tomiyama, Jason Helge Anderson:
Profiling-driven multi-cycling in FPGA high-level synthesis. DATE 2015: 31-36 - [c18]Tanvir Ahmed, Noriaki Sakamoto, Jason Helge Anderson, Yuko Hara-Azumi:
Synthesizable-from-C Embedded Processor Based on MIPS-ISA and OISC. EUC 2015: 114-123 - 2014
- [j16]Yuko Hara, Franco Pestilli, Justin L. Gardner:
Differing effects of attention in single-units and populations are well predicted by heterogeneous tuning and the normalization model of attention. Frontiers Comput. Neurosci. 8: 12 (2014) - [j15]Ittetsu Taniguchi, Junya Kaida, Takuji Hieda, Yuko Hara-Azumi, Hiroyuki Tomiyama:
Static Mapping with Dynamic Switching of Multiple Data-Parallel Applications on Embedded Many-Core SoCs. IEICE Trans. Inf. Syst. 97-D(11): 2827-2834 (2014) - [j14]Yuko Hara-Azumi, Toshinobu Matsuba, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada:
Impact of Resource Sharing and Register Retiming on Area and Performance of FPGA-based Designs. Inf. Media Technol. 9(1): 26-34 (2014) - [j13]Yuko Hara-Azumi, Toshinobu Matsuba, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada:
Impact of Resource Sharing and Register Retiming on Area and Performance of FPGA-based Designs. IPSJ Trans. Syst. LSI Des. Methodol. 7: 37-45 (2014) - [c17]Yuko Hara-Azumi, Masaya Kunimoto, Yasuhiko Nakashima:
Emulator-oriented tiny processors for unreliable post-silicon devices: A case study. ASP-DAC 2014: 85-90 - [c16]Shunichi Sanae, Yuko Hara-Azumi, Shigeru Yamashita, Yasuhiko Nakashima:
Better-Than-DMR Techniques for Yield Improvement. FCCM 2014: 34 - 2013
- [j12]Tanvir Ahmed, Jun Yao, Yuko Hara-Azumi, Shigeru Yamashita, Yasuhiko Nakashima:
Selective Check of Data-Path for Effective Fault Tolerance. IEICE Trans. Inf. Syst. 96-D(8): 1592-1601 (2013) - [j11]Junya Kaida, Yuko Hara-Azumi, Takuji Hieda, Ittetsu Taniguchi, Hiroyuki Tomiyama, Koji Inoue:
Static Mapping of Multiple Data-Parallel Applications on Embedded Many-Core SoCs. IEICE Trans. Inf. Syst. 96-D(10): 2268-2271 (2013) - [j10]Trung Anh Dinh, Shigeru Yamashita, Tsung-Yi Ho, Yuko Hara-Azumi:
Clique-Based Architectural Synthesis of Flow-Based Microfluidic Biochips. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(12): 2668-2679 (2013) - [j9]Yuko Hara-Azumi, Toshinobu Matsuba, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada:
Quantitative Evaluation of Resource Sharing in High-level Synthesis Using Realistic Benchmarks. Inf. Media Technol. 8(4): 924-928 (2013) - [j8]Yuko Hara-Azumi, Toshinobu Matsuba, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada:
Quantitative Evaluation of Resource Sharing in High-level Synthesis Using Realistic Benchmarks. IPSJ Trans. Syst. LSI Des. Methodol. 6: 122-126 (2013) - [c15]Trung Anh Dinh, Shigeru Yamashita, Tsung-Yi Ho, Yuko Hara-Azumi:
A clique-based approach to find binding and scheduling result in flow-based microfluidic biochips. ASP-DAC 2013: 199-204 - [c14]Yuko Hara-Azumi, Takuya Azumi, Nikil D. Dutt:
VISA synthesis: Variation-aware Instruction Set Architecture synthesis. ASP-DAC 2013: 243-248 - [c13]Yuko Hara-Azumi, Farshad Firouzi, Saman Kiamehr, Mehdi Baradaran Tahoori:
Instruction-set extension under process variation and aging effects. DATE 2013: 182-187 - [c12]Takuya Azumi, Yasaman Samei Syahkal, Yuko Hara-Azumi, Hiroshi Oyama, Rainer Dömer:
TECSCE: HW/SW Codesign Framework for Data Parallelism Based on Software Component. IESS 2013: 1-13 - [c11]Yuko Hara-Azumi, Hiroyuki Tomiyama:
Cost-efficient scheduling in high-level synthesis for Soft-Error Vulnerability Mitigation. ISQED 2013: 502-507 - 2012
- [c10]Yuko Hara, Hiroyuki Tomiyama:
Clock-constrained simultaneous allocation and binding for multiplexer optimization in high-level synthesis. ASP-DAC 2012: 251-256 - [c9]Yoshitaka Ushiku, Hiroshi Muraoka, Sho Inaba, Teppei Fujisawa, Koki Yasumoto, Naoyuki Gunji, Takayuki Higuchi, Yuko Hara, Tatsuya Harada, Yasuo Kuniyoshi:
ISI at ImageCLEF 2012: Scalable System for Image Annotation. CLEF (Online Working Notes/Labs/Workshop) 2012 - [c8]Yuko Hara-Azumi, Toshinobu Matsuba, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada:
Selective Resource Sharing with RT-Level Retiming for Clock Enhancement in High-Level Synthesis. HPCC-ICESS 2012: 1534-1540 - [c7]Masayuki Wakizaka, Hiroaki Yoshida, Yuko Hara-Azumi, Shigeru Yamashita:
A redundant wire addition method for Patchable Accelerator. ICECS 2012: 552-555 - [c6]Junya Kaida, Takuji Hieda, Ittetsu Taniguchi, Hiroyuki Tomiyama, Yuko Hara-Azumi, Koji Inoue:
Task mapping techniques for embedded many-core SoCs. ISOCC 2012: 204-207 - 2010
- [j7]Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada:
Partitioning of Behavioral Descriptions with Exploiting Function-Level Parallelism. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(2): 488-499 (2010) - [c5]Toshinobu Matsuba, Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada:
Aggressive Register Unsharing Based on SSA Transformation for Clock Enhancement in High-Level Synthesis. DELTA 2010: 87-92
2000 – 2009
- 2009
- [j6]Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada:
Proposal and Quantitative Analysis of the CHStone Benchmark Program Suite for Practical C-based High-level Synthesis. Inf. Media Technol. 4(4): 740-752 (2009) - [j5]Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada:
Proposal and Quantitative Analysis of the CHStone Benchmark Program Suite for Practical C-based High-level Synthesis. J. Inf. Process. 17: 242-254 (2009) - 2008
- [j4]Seiya Shibata, Shinya Honda, Yuko Hara, Hiroyuki Tomiyama, Hiroaki Takada:
Embedded System Covalidation with RTOS Model and FPGA. Inf. Media Technol. 3(4): 739-743 (2008) - [j3]Seiya Shibata, Shinya Honda, Yuko Hara, Hiroyuki Tomiyama, Hiroaki Takada:
Embedded System Covalidation with RTOS Model and FPGA. IPSJ Trans. Syst. LSI Des. Methodol. 1: 126-130 (2008) - [c4]Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada, Katsuya Ishii:
CHStone: A benchmark program suite for practical C-based high-level synthesis. ISCAS 2008: 1192-1195 - 2007
- [j2]Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada:
Function Call Optimization for Efficient Behavioral Synthesis. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(9): 2032-2036 (2007) - [j1]Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada, Katsuya Ishii:
Function-Level Partitioning of Sequential Programs for Efficient Behavioral Synthesis. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(12): 2853-2862 (2007) - [c3]Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada, Katsuya Ishii:
Complexity-constrainted partitioning of sequential programs for efficient behavioral synthesis. ACM Great Lakes Symposium on VLSI 2007: 365-370 - [c2]Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada, Katsuya Ishii:
Behavioral Synthesis of Double-Precision Floating-Point Adders with Function-Level Transformations: A Case Study. ICESS 2007: 261-270 - 2006
- [c1]Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada:
Function Call Optimization in Behavioral Synthesis. DSD 2006: 522-529
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2025-01-09 13:03 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
