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ORCIDVijay Kiran Kalyanam
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2020 – today
- 2021
[j2]Vijay Kiran Kalyanam
, Eric Mahurin, Keith A. Bowman, Jacob A. Abraham:
A Current and Temperature Limiting System in a 7-nm Hexagon™ Compute Digital Signal Processor. IEEE J. Solid State Circuits 56(3): 814-823 (2021)- [j1]Vijay Kiran Kalyanam, Eric Mahurin, Keith A. Bowman, Jacob A. Abraham:
A Proactive System for Voltage-Droop Mitigation in a 7-nm Hexagon™ Processor. IEEE J. Solid State Circuits 56(4): 1166-1175 (2021) - [c7]Vijay Kiran Kalyanam, Eric Mahurin, Keith A. Bowman, Suresh Venkumahanti:
35.3 Thread-Level Power Management for a Current- and Temperature-Limiting System in a 7nm Hexagon™ Processor. ISSCC 2021: 494-496 - 2020
- [c6]Vijay Kiran Kalyanam, Eric Mahurin, Keith A. Bowman, Jacob A. Abraham:
Randomized Pulse-Modulating Instruction-Issue Control Circuit for a Current and Temperature Limiting System in a 7nm Hexagon™ Compute DSP. CICC 2020: 1-4 - [c5]Vijay Kiran Kalyanam, Eric Mahurin, Michael Spence, Jacob A. Abraham:
Functional Test Sequences for Inducing Voltage Droops in a Multi-Threaded Processor. ITC 2020: 1-10 - [c4]Vijay Kiran Kalyanam, Eric Mahurin, Keith A. Bowman, Jacob A. Abraham:
A Proactive Voltage-Droop-Mitigation System in a 7nm Hexagon™ Processor. VLSI Circuits 2020: 1-2
2010 – 2019
- 2017
- [c3]Vijay Kiran Kalyanam, Peter G. Sassone, Jacob A. Abraham:
Power prediction of embedded scalar and vector processor: Challenges and solutions. ISQED 2017: 221-228 - 2015
- [c2]Vijay Kiran Kalyanam, Martin Saint-Laurent, Jacob A. Abraham:
Power-aware multi-voltage custom memory models for enhancing RTL and low power verification. ICCD 2015: 24-31
2000 – 2009
- 2007
- [c1]Rajeshwary Tayade, Vijay Kiran Kalyanam, Sani R. Nassif, Michael Orshansky, Jacob A. Abraham:
Estimating path delay distribution considering coupling noise. ACM Great Lakes Symposium on VLSI 2007: 61-66
Coauthor Index
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