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2020 – today
- 2022
[c14]Raman Maurya, Tee Hui Teo, Shi Hui Chua, Hwang-Cherng Chow, I-Chyn Wey:
Complex Human Activities Recognition Based on High Performance 1D CNN Model. MCSoC 2022: 330-336
2010 – 2019
- 2017
- [j3]Hwang-Cherng Chow, Prasenjit Chatterjee, Wu-Shiung Feng:
A Simple Drain Current Model for MOS Transistors with the Lorentz Force Effect. Sensors 17(6): 1199 (2017) - 2016
- [j2]Prasenjit Chatterjee, Hwang-Cherng Chow, Wu-Shiung Feng:
Drain Current Modulation of a Single Drain MOSFET by Lorentz Force for Magnetic Sensing Application. Sensors 16(9): 1389 (2016) - 2014
- [j1]I-Chyn Wey, Chien-Chang Peng, Hwang-Cherng Chow:
Wide bandwidth and high precision power supply noise detector by using dual peak detection sample and hold circuits. Int. J. Circuit Theory Appl. 42(5): 529-541 (2014)
2000 – 2009
- 2008
- [c13]Hwang-Cherng Chow, Zhi-Hau Hor:
A high performance peak detector sample and hold circuit for detecting power supply noise. APCCAS 2008: 672-675 - [c12]Hwang-Cherng Chow, Pu-Nan Weng:
A Low Voltage Rail-to-Rail OPAMP Design for Biomedical Signal Filtering Applications. DELTA 2008: 232-235 - 2007
- [c11]Hwang-Cherng Chow, Yi-Hung Chen:
1V 10-bit successive approximation ADC for low power biomedical applications. ECCTD 2007: 196-199 - [c10]Hwang-Cherng Chow, Jia-Yu Wang:
High CMRR instrumentation amplifier for biomedical applications. ISSPA 2007: 1-4 - 2005
- [c9]Hwang-Cherng Chow, Bo-Wei Chen, Hsiao-Chen Chen, Wu-Shiung Feng:
A 1.8 V, 0.3 mW, 10-bit SA-ADC with new self-timed timing control for biomedical applications. ISCAS (1) 2005: 736-739 - 2004
- [c8]Hwang-Cherng Chow, Shu-Hsien Chang:
High performance sense amplifier circuit for low power SRAM applications. ISCAS (2) 2004: 741-744 - 2003
- [c7]Hwang-Cherng Chow, I-Chyn Wey:
A 3.3 V 1 GHz low-latency pipelined Booth multiplier with new Manchester carry-pass adder. ISCAS (5) 2003: 121-124 - 2002
- [c6]Hwang-Cherng Chow, I-Hsin Wang:
High performance automatic gain control circuit using a S/H peak-detector for ASK receiver. ICECS 2002: 429-432 - [c5]Hwang-Cherng Chow, Yung-Kuo Ho:
New pixel-shared design and split-path readout of CMOS image sensor circuits. ISCAS (4) 2002: 49-52 - [c4]Hwang-Cherng Chow, I-Chyn Wey:
A 3.3 V 1 GHz high speed pipelined Booth multiplier. ISCAS (1) 2002: 457-460 - 2000
- [c3]Hwang-Cherng Chow, Chen-Yi Huang, Chih-Hong Chang:
Novel output buffer designs for universal serial bus IC applications. ICECS 2000: 3-6
1990 – 1999
- 1999
- [c2]Hwang-Cherng Chow:
Duty cycle control circuit and applications to frequency dividers. ICECS 1999: 1619-1622 - [c1]Hwang-Cherng Chow:
Bidirectional buffer for mixed voltage applications. ISCAS (1) 1999: 270-273
Coauthor Index
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