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ORCIDHojin Park
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2020 – today
- 2024
[j10]Jaewoo Park, Hojin Park, Eunju Jeong, Andrew Beng Jin Teoh
:
Understanding open-set recognition by Jacobian norm and inter-class separation. Pattern Recognit. 145: 109942 (2024)- [c25]Yoon Gyo Jung, Jaewoo Park, Xingbo Dong, Hojin Park, Andrew Beng Jin Teoh, Octavia I. Camps:
Face Reconstruction Transfer Attack as Out-of-Distribution Generalization. ECCV (75) 2024: 396-413 - [i4]Yoon Gyo Jung, Jaewoo Park, Xingbo Dong, Hojin Park, Andrew Beng Jin Teoh, Octavia I. Camps:
Face Reconstruction Transfer Attack as Out-of-Distribution Generalization. CoRR abs/2407.02403 (2024) - 2023
- [c24]Hojin Park, Jaewoo Park, Xingbo Dong, Andrew Beng Jin Teoh:
Towards Query Efficient and Generalizable Black-Box Face Reconstruction Attack. ICIP 2023: 1060-1064 - [c23]Jaeho Yoon, Jaewoo Park, Kensuke Wagata, Hojin Park, Andrew Beng Jin Teoh:
Pretrained Implicit-Ensemble Transformer for Open-Set Authentication on Multimodal Mobile Biometrics. ACM Multimedia 2023: 5909-5922 - [c22]Dezhi Li, Hojin Park, Xingbo Dong, Yen-Lung Lai, Hui Zhang, Andrew Beng Jin Teoh, Zhe Jin:
Minimum Assumption Reconstruction Attacks: Rise of Security and Privacy Threats Against Face Recognition. PRCV (5) 2023: 57-73 - [c21]Hojin Park, Gregory R. Ganger, George Amvrosiadis:
Mimir: Finding Cost-efficient Storage Configurations in the Public Cloud. SYSTOR 2023: 22-34 - [i3]Hojin Park, Jaewoo Park, Andrew Beng Jin Teoh:
Open-Set Face Identification on Few-Shot Gallery by Fine-Tuning. CoRR abs/2301.01922 (2023) - 2022
- [c20]Hojin Park, Jaewoo Park, Andrew Beng Jin Teoh:
Open-Set Face Identification on Few-Shot Gallery by Fine-Tuning. ICPR 2022: 1026-1032 - [i2]Jaewoo Park, Hojin Park, Eunju Jeong, Andrew Beng Jin Teoh:
Understanding Open-Set Recognition by Jacobian Norm of Representation. CoRR abs/2209.11436 (2022) - 2020
- [j9]Kyoungjin Lee, Haneul Kim, Jehyung Yoon, Hyoung-Seok Oh, Jin-Hong Park, Byeong-Ha Park, Hojin Park, Yoonmyung Lee:
An Asynchronous Boost Converter With Time-Based Dual-Mode Control for Wide Load Range and High Efficiency in SSD Applications. IEEE Trans. Ind. Electron. 67(12): 10520-10530 (2020) - [c19]Hojin Park, Gregory R. Ganger, George Amvrosiadis:
More IOPS for Less: Exploiting Burstable Storage in Public Clouds. HotCloud 2020
2010 – 2019
- 2019
- [c18]Soojeong Kim, Gyeong-In Yu, Hojin Park, Sungwoo Cho, Eunji Jeong, Hyeonmin Ha, Sanha Lee, Joo Seong Jeong, Byung-Gon Chun:
Parallax: Sparsity-aware Data Parallel Training of Deep Neural Networks. EuroSys 2019: 43:1-43:15 - [c17]Woo-Yeon Lee, Markus Weimer, Brian Cho, Byung-Gon Chun, Yunseong Lee, Joo Seong Jeong, Gyeong-In Yu, Jooyeon Kim, Hojin Park, Beomyeol Jeon, Won Wook Song, Gunhee Kim:
Automating System Configuration of Distributed Machine Learning. ICDCS 2019: 2057-2067 - 2018
- [i1]Soojeong Kim, Gyeong-In Yu, Hojin Park, Sungwoo Cho, Eunji Jeong, Hyeonmin Ha, Sanha Lee, Joo Seong Jeong, Byung-Gon Chun:
Parallax: Automatic Data-Parallel Training of Deep Neural Networks. CoRR abs/1808.02621 (2018) - 2017
- [j8]Gyu-Seob Jeong, Wooseok Kim, Jaejin Park, Taeik Kim, Hojin Park, Deog-Kyoon Jeong:
A 0.015-mm2 Inductorless 32-GHz Clock Generator With Wide Frequency-Tuning Range in 28-nm CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs 64-II(6): 655-659 (2017) - 2016
- [c16]Hyunik Kim, Yongjo Kim, Taeik Kim, Hojin Park, SeongHwan Cho:
19.3 A 2.4GHz 1.5mW digital MDLL using pulse-width comparator and double injection technique in 28nm CMOS. ISSCC 2016: 328-329 - 2015
- [j7]Yudong Zhang, Woogeun Rhee, Taeik Kim, Hojin Park, Zhihua Wang:
A 0.35-0.5-V 18-152 MHz Digitally Controlled Relaxation Oscillator With Adaptive Threshold Calibration in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 62-II(8): 736-740 (2015) - [c15]Joo-Myoung Kim, Jae-Seung Lee, Sun-a Kim, Taeik Kim, Hojin Park, Sang-Gug Lee:
A 72μW, 2.4GHz, 11.7% tuning range, 212dBc/Hz FoM LC-VCO in 65nm CMOS. CICC 2015: 1-4 - [c14]Sung-Jin Kim, Wooseok Kim, Minyoung Song, Jihyun F. Kim, Taeik Kim, Hojin Park:
15.5 A 0.6V 1.17ps PVT-tolerant and synthesizable time-to-digital converter using stochastic phase interpolation with 16× spatial redundancy in 14nm FinFET technology. ISSCC 2015: 1-3 - [c13]Hyojun Kim, Jinwoo Sang, Hyunik Kim, Youngwoo Jo, Taeik Kim, Hojin Park, SeongHwan Cho:
14.4 A 5GHz -95dBc-reference-Spur 9.5mW digital fractional-N PLL using reference-multiplied time-to-digital converter and reference-spur cancellation in 65nm CMOS. ISSCC 2015: 1-3 - [c12]Minyoung Song, Taeik Kim, Jihyun F. Kim, Wooseok Kim, Sung-Jin Kim, Hojin Park:
14.8 A 0.009mm2 2.06mW 32-to-2000MHz 2nd-order ΔΣ analogous bang-bang digital PLL with feed-forward delay-locked and phase-locked operations in 14nm FinFET technology. ISSCC 2015: 1-3 - 2014
- [j6]Wooseok Kim, Jaejin Park, Hojin Park, Deog-Kyoon Jeong:
Layout Synthesis and Loop Parameter Optimization of a Low-Jitter All-Digital Pixel Clock Generator. IEEE J. Solid State Circuits 49(3): 657-672 (2014) - [c11]Kangyeop Choo, Sung-Jin Kim, Wooseok Kim, Jihyun F. Kim, Taeik Kim, Hojin Park:
A 0.010mm2 9.92psrms low tracking jitter pixel clock generator with a divider initializer and a nearest phase selector in 28nm CMOS technology. CICC 2014: 1-4 - [c10]Jenlung Liu, Tae-Kwang Jang, Yonghee Lee, Jungeun Shin, Seunghoon Lee, Taeik Kim, Jaejin Park, Hojin Park:
15.2 A 0.012mm2 3.1mW bang-bang digital fractional-N PLL with a power-supply-noise cancellation technique and a walking-one-phase-selection fractional frequency divider. ISSCC 2014: 268-269 - [c9]Sung-Jin Kim, Taeik Kim, Hojin Park:
A 0.63ps, 12b, synchronous cyclic TDC using a time adder for on-chip jitter measurement of a SoC in 28nm CMOS technology. VLSIC 2014: 1-2 - 2013
- [j5]Minyoung Song, Young-Ho Kwak, Sunghoon Ahn, Hojin Park, Chulwoo Kim:
10-315-MHz Cascaded Hybrid Phase-Locked Loop for Pixel Clock Generation. IEEE Trans. Very Large Scale Integr. Syst. 21(11): 2080-2093 (2013) - [c8]Taehwan Kim, Do-Gyoon Song, Sangho Youn, Jaejin Park, Hojin Park, Jaeha Kim:
Verifying start-up failures in coupled ring oscillators in presence of variability using predictive global optimization. ICCAD 2013: 486-493 - [c7]Wooseok Kim, Jaejin Park, Jihyun F. Kim, Taeik Kim, Hojin Park, Deog-Kyoon Jeong:
A 0.032mm2 3.1mW synthesized pixel clock generator with 30psrms integrated jitter and 10-to-630MHz DCO tuning range. ISSCC 2013: 250-251 - [c6]Tae-Kwang Jang, Nan Xing, Frank Liu, Jungeun Shin, Hyungreal Ryu, Jihyun F. Kim, Taeik Kim, Jaejin Park, Hojin Park:
A 0.026mm2 5.3mW 32-to-2000MHz digital fractional-N phase locked-loop using a phase-interpolating phase-to-digital converter. ISSCC 2013: 254-255 - 2012
- [c5]Jong-Phil Hong, Sung-Jin Kim, Jenlung Liu, Nan Xing, Tae-Kwang Jang, Jaejin Park, Jihyun F. Kim, Taeik Kim, Hojin Park:
A 0.004mm2 250μW ΔΣ TDC with time-difference accumulator and a 0.012mm2 2.5mW bang-bang digital PLL using PRNG for low-power SoC applications. ISSCC 2012: 240-242 - [c4]Pyoungwon Park, Jaejin Park, Hojin Park, SeongHwan Cho:
An all-digital clock generator using a fractionally injection-locked oscillator in 65nm CMOS. ISSCC 2012: 336-337 - 2011
- [j4]Taein Hwang, Hojin Park, Euihyun Paik, Jinwook Chung:
EAFR-based DLNA proxy for high-quality video distribution in extended home space. IEEE Trans. Consumer Electron. 57(1): 120-125 (2011) - [c3]Jenlung Liu, Sehyung Jeon, Tae-Kwang Jang, Dohyung Kim, Jihyun F. Kim, Jaejin Park, Hojin Park:
A 0.8V, sub-mW, varactor-tuning ring-oscillator-based clock generator in 32nm CMOS. A-SSCC 2011: 337-340
2000 – 2009
- 2009
- [j3]Hojin Park, Moonok Choi, Euihyun Paik, Nam Kim:
Interoperability model for devices over heterogeneous home networks. IEEE Trans. Consumer Electron. 55(3): 1185-1191 (2009) - 2008
- [j2]Taein Hwang, Hojin Park, Jinwook Chung:
Personal Mobile A/V Control Point for Home-to-Home Media Streaming. IEEE Trans. Consumer Electron. 54(1): 87-92 (2008) - [j1]Hojin Park, Ilwoo Lee, Taein Hwang, Nam Kim:
Architecture of home gateway for device collaboration in extended home space. IEEE Trans. Consumer Electron. 54(4): 1692-1697 (2008) - 2007
- [c2]Taein Hwang, Hojin Park, Jin-Wook Chung:
Design of a Digital Home Service Delivery and Management System for OSGi Framework. APNOMS 2007: 1-10 - 2003
- [c1]Jaeyoung Shin, Sunki Min, Soosun Kim, Joongho Choi, Soohyoung Lee, Hojin Park, Jaewhui Kim:
3.3-V baseband Gm-C filters for wireless transceiver applications. ISCAS (1) 2003: 457-460
Coauthor Index
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