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ORCIDPalkesh Jain
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2020 – today
- 2023
[j7]Vidya A. Chhabria
, Vipul Ahuja, Ashwath Prabhu, Nikhil Patil, Palkesh Jain, Sachin S. Sapatnekar:
Encoder-Decoder Networks for Analyzing Thermal and Power Delivery Networks. ACM Trans. Design Autom. Electr. Syst. 28(1): 3:1-3:27 (2023)- 2021
- [c10]Vidya A. Chhabria, Vipul Ahuja, Ashwath Prabhu, Nikhil Patil, Palkesh Jain, Sachin S. Sapatnekar:
Thermal and IR Drop Analysis Using Convolutional Encoder-Decoder Networks. ASP-DAC 2021: 690-696 - [i2]Vidya A. Chhabria, Vipul Ahuja, Ashwath Prabhu, Nikhil Patil, Palkesh Jain, Sachin S. Sapatnekar:
Encoder-Decoder Networks for Analyzing Thermal and Power Delivery Networks. CoRR abs/2110.14197 (2021) - 2020
- [i1]Vidya A. Chhabria, Vipul Ahuja, Ashwath Prabhu, Nikhil Patil, Palkesh Jain, Sachin S. Sapatnekar:
Thermal and IR Drop Analysis Using Convolutional Encoder-Decoder Networks. CoRR abs/2009.09009 (2020)
2010 – 2019
- 2019
- [c9]Shashank Varshney, Hameedah Sultan, Palkesh Jain, Smruti R. Sarangi:
NanoTherm: An Analytical Fourier-Boltzmann Framework for Full Chip Thermal Simulations. ICCAD 2019: 1-8 - 2017
- [b1]Palkesh Jain:
Algorithms and methodologies for interconnect reliability analysis of integrated circuits. Polytechnic University of Catalonia, Spain, 2017 - [j6]Palkesh Jain, Vivek Mishra, Sachin S. Sapatnekar:
Fast Stochastic Analysis of Electromigration in Power Distribution Networks. IEEE Trans. Very Large Scale Integr. Syst. 25(9): 2512-2524 (2017) - [c8]Vivek Mishra, Palkesh Jain, Sravan K. Marella, Sachin S. Sapatnekar:
Incorporating the Role of Stress on Electromigration in Power Grids with Via Arrays. DAC 2017: 21:1-21:6 - 2016
- [j5]Gracieli Posser, Vivek Mishra, Palkesh Jain, Ricardo Reis, Sachin S. Sapatnekar:
Cell-Internal Electromigration: Analysis and Pin Placement Based Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(2): 220-231 (2016) - [j4]Palkesh Jain, Jordi Cortadella, Sachin S. Sapatnekar:
A Fast and Retargetable Framework for Logic-IP-Internal Electromigration Assessment Comprehending Advanced Waveform Effects. IEEE Trans. Very Large Scale Integr. Syst. 24(6): 2345-2358 (2016) - 2015
- [c7]Palkesh Jain, Sachin S. Sapatnekar, Jordi Cortadella:
A retargetable and accurate methodology for logic-IP-internal electromigration assessment. ASP-DAC 2015: 346-351 - [c6]Gracieli Posser, Vivek Mishra, Palkesh Jain, Ricardo Reis, Sachin S. Sapatnekar:
Impact on performance, power, area and wirelength using electromigration-aware cells. ICECS 2015: 129-132 - [c5]Palkesh Jain, Sachin S. Sapatnekar, Jordi Cortadella:
Stochastic and topologically aware electromigration analysis for clock skew. IRPS 2015: 3 - [c4]Gracieli Posser, Lucas de Paris, Vivek Mishra, Palkesh Jain, Ricardo Reis, Sachin S. Sapatnekar:
Reducing the signal Electromigration effects on different logic gates by cell layout optimization. LASCAS 2015: 1-4 - 2014
- [j3]Palkesh Jain, Bapana Pudi, Meghna Sreenivasan:
Design-in-reliability: From library modeling and optimization to gate-level verification. Microelectron. Reliab. 54(6-7): 1421-1432 (2014) - [j2]Palkesh Jain, Frank Cano, Bapana Pudi, N. V. Arvind:
Asymmetric Aging: Introduction and Solution for Power-Managed Mixed-Signal SoCs. IEEE Trans. Very Large Scale Integr. Syst. 22(3): 691-695 (2014) - [c3]Gracieli Posser, Vivek Mishra, Palkesh Jain, Ricardo Reis, Sachin S. Sapatnekar:
A systematic approach for analyzing and optimizing cell-internal signal electromigration. ICCAD 2014: 486-491 - 2012
- [j1]Palkesh Jain, Ankit Jain:
Accurate Current Estimation for Interconnect Reliability Analysis. IEEE Trans. Very Large Scale Integr. Syst. 20(9): 1634-1644 (2012) - 2011
- [c2]Palkesh Jain, Ankit Jain:
Accurate Estimation of Signal Currents for Reliability Analysis Considering Advanced Waveform-Shape Effects. VLSI Design 2011: 118-123
2000 – 2009
- 2006
- [c1]Palkesh Jain, D. Vinay Kumar, J. M. Vasi, Mahesh B. Patil:
Evaluation of Non-Quasi-Static Effects during SEU in Deep-Submicron MOS Devices and Circuits. VLSI Design 2006: 188-193
Coauthor Index
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