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Tetsuya Uchida
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2010 – 2019
- 2011
- [c1]Tetsuya Uchida, Xu Cao, Shigeki Hirobayashi, Tadanobu Misawa, Toshio Yoshizawa, Changho Chong, Atsushi Morosawa, Takuya Suzuki:
The simulation for accuracy validation of OCT based non-harmonic analysis. BMEI 2011: 532-535
2000 – 2009
- 2000
- [j4]Yasuhiro Takai, Mamoru Fujita, Kyoichi Nagata, Satoshi Isa, Shigeyuki Nakazawa, Atsunori Hirobe, Hiroaki Ohkubo, Masato Sakao, Shinichi Horiba, Tadashi Fukase, Yoshihiro Takaishi, Makoto Matsuo, Masahiro Komuro, Tetsuya Uchida, Takashi Sakoh, Kanta Saino, Shirou Uchiyama, Yuichi Takada, Junichi Sekine, Nobuko Nakanishi, Takeshi Oikawa, Masahiko Igeta, Hiroyoshi Tanabe, Hidenobu Miyamoto, Takeo Hashimoto, Hiromu Yamaguchi, Kuniaki Koyama, Yasuo Kobayashi, Takashi Okuda:
A 250-Mb/s/pin, 1-Gb double-data-rate SDRAM with a bidirectional delay and an interbank shared redundancy scheme. IEEE J. Solid State Circuits 35(2): 149-162 (2000)
1990 – 1999
- 1997
- [j3]Kazuyuki Nakamura, Koichi Takeda, Hideo Toyoshima, Kenji Noda, Hiroaki Ohkubo, Tetsuya Uchida, Toshiyuki Shimizu, Toshiro Itani, Ken Tokashiki, Koji Kishimoto:
A 500-MHz 4-Mb CMOS pipeline-burst cache SRAM with point-to-point noise reduction coding I/O. IEEE J. Solid State Circuits 32(11): 1758-1765 (1997) - 1995
- [j2]Masato Fujinaga, I. Tottori, Tatsuya Kunikiyo, Tetsuya Uchida, Norihiko Kotani, Yasumasa Tsukamoto:
3-D numerical modeling of thermal flow for insulating thin film using surface diffusion. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(5): 631-638 (1995) - 1994
- [j1]Tatsuya Kunikiyo, Katsuyoshi Mitsui, Masato Fujinaga, Tetsuya Uchida, Norihiko Kotani:
Reverse short-channel effect due to lateral diffusion of point-defect induced by source/drain ion implantation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(4): 507-514 (1994)
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