"A 28 nm 2 Mbit 6 T SRAM With Highly Configurable Low-Voltage Write-Ability ..."

Mahmut E. Sinangil et al. (2016)

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DOI: 10.1109/JSSC.2015.2498302

access: closed

type: Journal Article

metadata version: 2020-08-30

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Mahmut E. Sinangil, John W. Poulton, Matthew R. Fojtik, Thomas H. Greer, Stephen G. Tell, Andreas J. Gotterba, Jesse Wang, Jason Golbus, Brian Zimmer, William J. Dally, C. Thomas Gray:
A 28 nm 2 Mbit 6 T SRAM With Highly Configurable Low-Voltage Write-Ability Assist Implementation and Capacitor-Based Sense-Amplifier Input Offset Compensation. IEEE J. Solid State Circuits 51(2): 557-567 (2016)

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