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  • Hou N, Yan X and He F. (2019). A survey on partitioning models, solution algorithms and algorithm parallelization for hardware/software co-design. Design Automation for Embedded Systems. 23:1-2. (57-77). Online publication date: 1-Jun-2019.

    https://doi.org/10.1007/s10617-019-09220-7

  • Zha Y and Li J. (2018). Liquid Silicon-Monona. ACM SIGPLAN Notices. 53:2. (214-228). Online publication date: 30-Nov-2018.

    https://doi.org/10.1145/3296957.3173167

  • Zha Y and Li J. Liquid Silicon-Monona. Proceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems. (214-228).

    https://doi.org/10.1145/3173162.3173167

  • Ramezani R, Sedaghat Y and Clemente J. (2017). Reliability Improvement of Hardware Task Graphs via Configuration Early Fetch. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25:4. (1408-1420). Online publication date: 1-Apr-2017.

    https://doi.org/10.1109/TVLSI.2016.2631724

  • Morales-Villanueva A, Kumar R and Gordon-Ross A. Configuration prefetching and reuse for preemptive hardware multitasking on partially reconfigurable FPGAs. Proceedings of the 2016 Conference on Design, Automation & Test in Europe. (1505-1508).

    /doi/10.5555/2971808.2972159

  • Lifa A, Eles P and Peng Z. Dynamic configuration prefetching based on piecewise linear prediction. Proceedings of the Conference on Design, Automation and Test in Europe. (815-820).

    /doi/10.5555/2485288.2485486

  • Banerjee S, Bozorgzadeh E, Noguera J and Dutt N. (2010). Bandwidth Management in Application Mapping for Dynamically Reconfigurable Architectures. ACM Transactions on Reconfigurable Technology and Systems (TRETS). 3:3. (1-30). Online publication date: 1-Sep-2010.

    https://doi.org/10.1145/1839480.1839488

  • Banerjee S, Bozorgzadeh E and Dutt N. (2019). Exploiting application data-parallelism on dynamically reconfigurable architectures. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 17:2. (234-247). Online publication date: 1-Feb-2009.

    https://doi.org/10.1109/TVLSI.2008.2003490

  • Chevobbe S and Guyetant S. (2009). Reducing reconfiguration overheads in heterogeneous multicore RSoCs with predictive configuration management. International Journal of Reconfigurable Computing. 2009. (4-4). Online publication date: 1-Jan-2009.

    https://doi.org/10.1155/2009/390167

  • Hsiung P, Huang C and Chen Y. (2009). Hardware task scheduling and placement in operating systems for dynamically reconfigurable SoC. Journal of Embedded Computing. 3:1. (53-62). Online publication date: 1-Jan-2009.

    /doi/10.5555/1516712.1516718

  • Resano J, Clemente J, Gonzalez C, Mozos D and Catthoor F. (2008). Efficiently scheduling runtime reconfigurations. ACM Transactions on Design Automation of Electronic Systems (TODAES). 13:4. (1-12). Online publication date: 1-Sep-2008.

    https://doi.org/10.1145/1391962.1391966

  • Qu Y, Soininen J and Nurmi J. Improving the efficiency of run time reconfigurable devices by configuration locking. Proceedings of the conference on Design, automation and test in Europe. (264-267).

    https://doi.org/10.1145/1403375.1403439

  • Hsiung P, Lu P and Liu C. Energy efficient co-scheduling in dynamically reconfigurable systems. Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis. (87-92).

    https://doi.org/10.1145/1289816.1289840

  • Banerjee S, Bozorgzadeh E, Dutt N and Noguera J. Selective bandwidth and resource management in scheduling for dynamically reconfigurable architectures. Proceedings of the 44th annual Design Automation Conference. (771-776).

    https://doi.org/10.1145/1278480.1278673

  • Kim J, Cho J and Kim T. (2018). Temporal Partitioning to Amortize Reconfiguration Overhead for Dynamically Reconfigurable Architectures. IEICE - Transactions on Information and Systems. E90-D:12. (1977-1985). Online publication date: 1-Dec-2007.

    https://doi.org/10.1093/ietisy/e90-d.12.1977

  • Qu Y, Soininen J and Nurmi J. A parallel configuration model for reducing the run-time reconfiguration overhead. Proceedings of the conference on Design, automation and test in Europe: Proceedings. (965-969).

    /doi/10.5555/1131481.1131750

  • Ramo E, Resano J, Mozos D and Catthoor F. A configuration memory hierarchy for fast reconfiguration with reduced energy consumption overhead. Proceedings of the 20th international conference on Parallel and distributed processing. (189-189).

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