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Despite recent advances in algorithms, such as the use of reinforcement learning, analog circuit sizing optimization remains a challenging task that demands numerous circuit simulations, hence extensive CPU times. This paper introduces the application of ...

This paper presents an adderless feed-forward incremental $\Delta \Sigma$ (I$\Delta \Sigma$) with asynchronous SAR (ASAR) that removes the need for in-column calibration by using global references, eliminates an additional summing amplifier and reduces the conversion time ...$$$\mathrm{}$$\mathrm{}$$\mathrm{}$${}_{\mathit{}}$$\mathrm{}$$\mathrm{}$${}_{}$${}_{}$${}_{}{}_{}$$$${}^{\mathrm{}}$

In industry-scale integrated circuit (IC) production, continuous improvements in processing and testing have resulted in defect test escape rates gradually reaching levels below 100 PPB for analog and mixed-signal (AMS) ICs. Newer methodologies are needed ...

Level-crossing analog-to-digital converters (LC-ADCs) are neuromorphic, event-driven data converters that are gaining much attention for resource-constrained applications where intelligent sensing must be provided at the extreme edge, with tight energy ...

Hyperdimensional Computing (HDC) is an emerging brain-inspired machine learning method that is recently gaining much attention for performing tasks such as pattern recognition and bio-signal classification with ultra-low energy and area overheads when ...

With quality and reliability requirements moving toward the ppb level, latent defects have become a major bottleneck. This article introduces a new metric, called difference in the distance to mean value (DDtM), that exploits the latent defect information ...

Neuromorphic near-sensor computing has recently emerged as a low-power and low-memory paradigm for the design of artificial intelligence (AI)-enabled IoT devices working at the extreme edge. Compared to conventional sensing and learning techniques, ...

This paper introduces EffiCSense, an architectural pathfinding framework for mixed-signal sensor front-ends for both regular and compressive sensing systems. Since sensing systems are often energy constrained, finding a suitable architecture can be a ...

In a number of applications ranging from warehouse management to people search and rescue, drones will need to evolve in the vicinity of human agents. In those situations, robust and fail-safe human detection by drones must be provided. However, human ...

Safety-critical and mission-critical systems, such as airplanes or (semi-)autonomous cars, are relying on an ever-increasing number of embedded integrated circuits. Consequently, there is a need for complete defect coverage during the testing of these ...

This book discusses both architecture- and circuit-level design aspects of voltage-controlled-oscillator (VCO)-based analog-to-digital converters (ADCs), especially focusing on mitigation of VCO nonlinearity and the improvement of power efficiency. It ...

This paper presents a method to address the automatic testing of analog ICs for catastrophic defects. Based on Design-for-Testability building blocks offering extra controllability and extra observability, a test infrastructure is generated for a ...

Real-world computationally expensive design optimization problems with discrete variables pose challenges to surrogate-based optimization methods in terms of both efficiency and search ability. In this paper, a new method is introduced, called surrogate ...

As the minimum transistor length reaches the deca-nanometer scale, both time-zero and time-dependent variability, the latter including Random Telegraph Noise (RTN) and Bias Temperature Instability (BTI), become a great concern for IC design. Accurate ...

A 4th-order 40 MHz-BW 12-bit continuous-time delta-sigma modulator with digital calibration is presented. A cost-efficient current-shaping technique for the SC DAC is proposed to relax the OTA slewing requirement. The DAC static and dynamic mismatches ...

This article presents a comparative study of a time-based sensor interface implemented in two standard CMOS technologies, 130 and 40 nm. The interface uses a ring oscillator to generate a pulse-width modulated signal of which the duty cycle is ...

The scaling of VLSI technology results in reduced supply voltages, hence jeopardizing the voltage swing and signal-to-noise ratio achievable by analog integrated circuits. An alternative is to take advantage of the increased timing resolution of faster ...

This paper presents an ultra-low-power, low-voltage sensor node for wireless sensor networks. The node scavenges RF energy out of the environment, resulting in a limited available power budget and causing an unstable supply voltage. Hence, accurate and ...

A method for the sparse solution of $$\varepsilon $$ -tube support vector regression machines is presented. The proposed method achieves a high accuracy versus complexity ratio and allows the user to adjust the complexity of the resulting models. The sparse ...