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research-article
ReaDy: A ReRAM-Based Processing-in-Memory Accelerator for Dynamic Graph Convolutional Networks

Dynamic graph convolutional networks (DGCNs) have emerged as an effective approach to analyzing graph data that is constantly changing. The typical DGCNs incorporate not only graph convolutional networks (GCNs) to extract the structural information but ...

research-article
GCIM: Toward Efficient Processing of Graph Convolutional Networks in 3D-Stacked Memory

Graph convolutional networks (GCNs) have become a powerful deep learning approach for graph-structured data. Different from traditional neural networks such as convolutional neural networks, GCNs handle irregular input graph data, and GCNs are both ...

research-article
Adaptive Mode Transformation for Wear Leveling in Nonvolatile FPGAs

Nowadays, field programmable gate arrays (FPGAs) have been widely adopted to serve as accelerators in artificial intelligence and big data related applications. Since the static random access memory (SRAM)-based FPGA is suffering from limited density and ...

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NeuroMap: Efficient Task Mapping of Deep Neural Networks for Dynamic Thermal Management in High-Bandwidth Memory

High-bandwidth memory (HBM) offers breakthrough memory bandwidth through its vertically stacked memory architecture and through-silicon via (TSV)-based fast interconnect. However, the stacked architecture leads to high-power density causing thermal issues ...

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Stochastic Guarantees for Adaptive Energy Harvesting Systems

Energy harvesting is increasingly used as a long-term energy supply for the Internet of Things, wireless sensor networks, and cyber-physical systems. However, the challenge of mitigating the variability of energy harvesting sources needs to be addressed ...

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Accelerating Large-Scale Graph Neural Network Training on Crossbar Diet

Resistive random-access memory (ReRAM)-based manycore architectures enable acceleration of graph neural network (GNN) inference and training. GNNs exhibit characteristics of both DNNs and graph analytics. Hence, GNN training/inferencing on ReRAM-based ...

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iNVMFS: An Efficient File System for NVRAM-Based Intermittent Computing Devices

Developing toward battery-less, energy-harvesting designs is a promising direction for sensor-scale devices. The recent introduction of byte-addressable, nonvolatile memory (NVRAM) enables intermittent computing, which preserves as much program progress ...

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Hardware-Friendly Delayed-Feedback Reservoir for Multivariate Time-Series Classification

Reservoir computing (RC) is attracting attention as a machine-learning technique for edge computing. In time-series classification tasks, the number of features obtained using a reservoir depends on the length of the input series. Therefore, the features ...

research-article
BLAST: Belling the Black-Hat High-Level Synthesis Tool

A hardware Trojan (HT) is a malicious modification of the design done by a rogue employee or a malicious foundry to leak secret information, create a backdoor for attackers, alter functionality, degrade performance and even halt the system. In Black-hat ...

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Response-Time Analysis of Limited-Preemptive Sporadic DAG Tasks

Guaranteeing timing constraints for parallel real-time applications deployed on multicore platforms is challenging, especially for applications containing non-preemptive execution blocks, that suffer from priority inversions. In this article, we propose ...

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eRDAC: Efficient and Reliable Remote Direct Access and Control for Embedded Systems

Emerging embedded systems, such as autonomous vehicles, demand highly efficient remote data transfer, whereas existing networking hardware and protocols cause high communication latency and CPU consumption. In this article, we propose embedded RDAC (eRDAC)...

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SENTunnel: Fast Path for Sensor Data Access on Automotive Embedded Systems

Emerging autonomous vehicles equip multiple high-throughput sensors to enable automatic driving, such as multiline lidars and high-definition cameras. Existing automotive embedded systems usually employ software stacks to receive and preprocess high-...

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MAID-Q: Minimizing Tail Latency in Embedded Flash With SMR Disk via -Learning Model<italic/>

As the mainstream solid-state storage technology, NAND flash has the advantages of tiny size, cost-effective, and high performance, which make it a promising candidate to be embedded into the shingled magnetic recording (SMR) disk to build a faster, ...

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Intermittent-Aware Distributed Concurrency Control

Internet of Things (IoT) devices are gradually adopting battery-less, energy harvesting solutions, thereby driving the development of an intermittent computing paradigm to accumulate computation progress across multiple power cycles. While many attempts ...

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ARMISTICE: Microarchitectural Leakage Modeling for Masked Software Formal Verification

Side-channel attacks are powerful attacks for retrieving secret data by exploiting physical measurements, such as power consumption or electromagnetic emissions. Masking is a popular countermeasure as it can be proven secure against an attacker model. In ...

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A Flexible Yet Efficient DNN Pruning Approach for Crossbar-Based Processing-in-Memory Architectures

Pruning deep neural networks (DNNs) can reduce the model size and thus save hardware resources of a resistive-random-access-memory (ReRAM)-based DNN accelerator. For the tightly coupled crossbar structure, existing ReRAM-based pruning techniques prune the ...

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Toward Register Spilling Security Using LLVM and ARM Pointer Authentication

Modern reduced instruction set computer processors are based on a load/store architecture, where all computations are performed on register operands. Compilers therefore allocate registers based on demand, and when occupancy is at maximum, register ...

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Efficient Hardware Acceleration of Sparsely Active Convolutional Spiking Neural Networks

Spiking neural networks (SNNs) compute in an event-based manner to achieve a more efficient computation than standard neural networks. In SNNs, neuronal outputs are not encoded as real-valued activations but as sequences of binary spikes. The motivation ...

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NASA: NVM-Assisted Secure Deletion for Flash Memory

Secure deletion in flash-based storage is crucial for data security. However, existing secure deletion schemes for flash memory suffer from performance degradation and reliability issues and cannot provide secure deletion guarantees. Although emerging ...

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Exploring Synchronous Page Fault Handling

The advance of nonvolatile memory in storage technology has presented challenges in redefining the ways in handling the main memory and the storage. This work is motivated by the strong demands in effective handling of page faults over ultralow-latency ...

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Horae: A Hybrid I/O Request Scheduling Technique for Near-Data Processing-Based SSD

Near-data processing (NDP) architecture is promised to break the bottleneck of data movement in many scenarios (e.g., databases and recommendation systems), which limits the efficiency of data processing. Different from traditional SSD, NDP-based SSD not ...

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When B-Tree Meets Skyrmion Memory: How Skyrmion Memory Affects an Indexing Scheme<sup/>

Because of large cell density, fast read/write performance, and no limited write cycles, magnetic skyrmion racetrack memory (SK-RM) has been regarded as the next-generation main memory technology. However, the characteristics of SK-RM are not friendly for ...

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GNN4REL: Graph Neural Networks for Predicting Circuit Reliability Degradation

Process variations and device aging impose profound challenges for circuit designers. Without a precise understanding of the impact of variations on the delay of circuit paths, guardbands, which keep timing violations at bay, cannot be correctly ...

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Energy-Efficient DNN Inference on Approximate Accelerators Through Formal Property Exploration

Deep neural networks (DNNs) are being heavily utilized in modern applications, putting energy-constraint devices to the test. To bypass high energy consumption issues, approximate computing has been employed in DNN accelerators to balance out the accuracy-...

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DynLiB: Maximizing Energy Availability of Hybrid Li-Ion Battery Systems

Battery-powered devices commonly use Li-ion batteries due to their high energy density. Unfortunately, low ambient temperature and high discharge current significantly affect the available capacity of Li-ion batteries at runtime. One solution to handle ...

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Detecting Spoofed Speeches via Segment-Based Word CQCC and Average ZCR for Embedded Systems

Intelligent speech recognition is increasingly used in embedded systems, which is also seriously threatened by malicious speech spoofing attacks. Different from the conventional methods, this article proposes a segment-based anti-spoofing detection (SASD) ...

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Toward Minimum WCRT Bound for DAG Tasks Under Prioritized List Scheduling Algorithms

Many modern real-time parallel applications can be modeled as a directed acyclic graph (DAG) task. Recent studies show that the worst-case response time (WCRT) bound of a DAG task can be significantly reduced when the execution order of the vertices is ...

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Adaptive Edge Offloading for Image Classification Under Rate Limit

This article considers a setting where embedded devices are used to acquire and classify images. Because of limited computing capacity, embedded devices rely on a parsimonious classification model with uneven accuracy. When local classification is deemed ...

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Efficient Complete Verification of Neural Networks via Layerwised Splitting and Refinement

Safety and robustness properties are highly required for neural networks deployed in safety-critical applications. Current complete verification techniques of these properties suffer from the lack of efficiency and effectiveness. In this article, we ...

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Enabling Weakly Supervised Temporal Action Localization From On-Device Learning of the Video Stream

Detecting actions in videos have been widely applied in on-device applications, such as cars, robots, etc. Practical on-device videos are always untrimmed with both action and background. It is desirable for a model to both recognize the class of action ...

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