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Data-driven applications are increasingly central to our information technology society, propelled by AI techniques reshaping various sectors of our economy. Despite their transformative potential, these applications demand immense data processing, ...

There is a high energy cost associated with training Deep Neural Networks (DNNs). Off-chip memory access contributes a major portion to the overall energy consumption. Reduction in the number of off-chip memory transactions can be achieved by ...$$$\mathrm{}$

With scaling unabated, device density continues to increase, but power and thermal budgets prevent the full use of all available devices. This leads to the exploration of alternative circuit styles beyond traditional CMOS, especially dynamic data-...

LPDDR4, the most widely used low-power DRAM standard in the industry, plays a crucial role in modern system design. Understanding the non-functional properties of these DRAMs such as power consumption and reliability is essential for accurate system ...

To satisfy the growing throughput demand of data-intensive applications, the performance of optical communication systems increased dramatically in recent years. With higher throughput, more advanced equalizers are crucial, to compensate for ...

Nowadays, DRAM subsystem configuration includes a large number of parameters, resulting in an extensive design space. Setting these parameters is a challenging step in system design as the parameter-workload interactions are complex. Since design space ...

Security is one of the biggest challenges, particularly in the Industrial IoT and in critical infrastructures. Complex cryptographic computations are in contrast to the low energy budget of the devices, especially when independence from the power ...

Approximate computing and mixed-signal in-memory accelerators are promising paradigms to significantly reduce computational requirements of deep neural network (DNN) inference without accuracy loss. In this work, we present a novel in-memory design for ...

Today, a large number of applications depend on deep neural networks (DNN) to process data and perform complicated tasks at restricted power and latency specifications. Therefore, processing-in-memory (PIM) platforms are actively explored as a promising ...

LPDDR5 is the latest low-power DRAM standard and expected to be used in various application fields. The vendors have published promising peak bandwidths up to 50 % higher than those of the predecessor LPDDR4. In this paper we evaluate the best-case and ...

The large number of recent JEDEC DRAM standard releases and their increasing feature set makes it difficult for designers to rapidly upgrade the memory controller IPs to each new standard. Especially hardware verification is challenging due to the higher ...

Low-density parity-check (LDPC) codes are a well-established class of forward error correction codes that provide excellent error correction performance for large code block sizes. However, for throughputs toward 1 Tbit/s, as expected for B5G ...$\mathrm{}$$\mathrm{}$$\mathrm{}$${}_{}\mathrm{}$

In this demonstration, we present a system design that helps to reduce the split attention effect in multimedia learning by providing an interactive environment with augmented reality support for elementary physics education. The system consists of ...

Recently, we are witnessing a surge in DRAM-based Processing in Memory (PIM) publications from academia and industry. The architectures and design techniques proposed in these publications vary largely, ranging from integration of computation ...

The simulation of Dynamic Random Access Memories (DRAMs) on system level requires highly accurate models due to their complex timing and power behavior. However, conventional cycle-accurate DRAM subsystem models often become a bottleneck for the ...

With the slow-down of Moore's law and the increasing requirements on energy efficiency, alternative logic styles compared to complementary static CMOS have to be revisited for digital circuit implementations. Pass Transistor Logic (PTL) gained much ...

In communication systems, autoencoder refers to a system that replaces parts of the traditional transmitter and receiver of the baseband processing chain with artificial neural networks (ANNs). This allows to jointly train the system for an underlying ...

Multidimensional Long Short-Term Memory (MD-LSTM) neural network is an extension of one-dimensional LSTM for data with more than one dimension. MD-LSTM achieves state-of-the-art results in various applications, including handwritten text recognition, ...

The increasing demand for DRAM in modern vehicles creates new challenges for automobile manufacturers. To allow DRAM subsystems to be used in safety-critical tasks like autonomous driving, a special Automotive Safety Integrity Level (ASIL) grading ...