Analyzing and addressing false interactions during compiler optimization phase ordering
Abstract
Compiler optimization phase ordering is a fundamental, pervasive, and long-standing problem for optimizing compilers. This problem is caused by interacting optimization phases producing different codes when applied in different orders. Producing the best phase ordering code is very important in performance-oriented and cost-constrained domains, such as embedded systems. In this work, we analyze the causes of the phase ordering problem in our compiler, Very Portable Optimizer VPO, and report our observations. We devise new techniques to eliminate, what we call, false phase interactions in our compiler. We find that reducing such false phase interactions significantly prunes the phase order search space. We also develop and study algorithms to find the best average performance that can be delivered by a single phase sequence over our benchmark set and discuss the challenges in resolving this important problem. Our results show that there is no single sequence in VPO that can achieve the optimal phase ordering performance across all functions. Copyright © 2013 John Wiley & Sons, Ltd.
References
[1]
Jantz MR, Kulkarni PA. Eliminating false phase interactions to reduce optimization phase order search space. In Proceedings of the 2010 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, <bookSeriesTitle>CASES '10</bookSeriesTitle>. ACM: Scottsdale, Arizona, United States, 2010; pp.187-196.
[2]
Davidson JW. A retargetable instruction reorganizer. SIGPLAN Not 1986; Volume 21 Issue 7: pp.234-241.
[3]
Benitez ME, Davidson JW. A portable global optimizer and linker. Proceedings of the SIGPLAN'88 Conference on Programming Language Design and Implementation, Atlanta, Georgia, United States, 1988; pp.329-338.
[4]
Goodman JR, Hsu WC. Code scheduling and register allocation in large basic blocks. ICS '88: Proceedings of the 2nd International Conference on Supercomputing, St. Malo, France, 1988; pp.442-452.
[5]
Vegdahl SR. Phase coupling and constant generation in an optimizing microcode compiler. In Proceedings of the 15th Annual Workshop on Microprogramming, IEEE Press: Palo Alto, California, United States, 1982; pp.125-133.
[6]
Kisuki T, Knijnenburg P, O'Boyle M, Bodin F, Wijshoff H. A feasibility study in iterative compilation. Proceedings of ISHPC'99, volume 1615 of Lecture Notes in Computer Science, Kyoto, Japan, 1999; pp.121-132.
[7]
Pan Z, Eigenmann R. Fast and effective orchestration of compiler optimizations for automatic performance tuning. In CGO '06: Proceedings of the International Symposium on Code Generation and Optimization, IEEE Computer Society, Washington, DC, USA, 2006; pp.319-332.
[8]
Haneda M, Knijnenburg PMW, Wijshoff HAG. Generating new general compiler optimization settings. ICS '05: Proceedings of the 19th Annual International Conference on Supercomputing, Cambridge, Massachusetts, United States, 2005; pp.161-168.
[9]
Triantafyllis S, Vachharajani M, Vachharajani N, August DI. Compiler optimization-space exploration. Proceedings of the International Symposium on Code Generation and Optimization, San Francisco, California, United States, 2003; pp.204-215.
[10]
Cooper KD, Schielke PJ, Subramanian D. Optimizing for reduced code space using genetic algorithms. Workshop on Languages, Compilers, and Tools for Embedded Systems, Atlanta, Georgia, United States, 1999; pp.1-9.
[11]
Kulkarni P, Zhao W, Moon H, Cho K, Whalley D, Davidson J, Bailey M, Paek Y, Gallivan K. Finding effective optimization phase sequences. Proceedings of the 2003 ACM SIGPLAN Conference on Languages, Compilers, and Tools for Embedded Systems, San Diego, California, United States, 2003; pp.12-23.
[12]
Agakov F, Bonilla E, Cavazos J, Franke B, Fursin G, O'Boyle MFP, Thomson J, Toussaint M, Williams CKI. Using machine learning to focus iterative optimization. CGO '06: Proceedings of the International Symposium on Code Generation and Optimization, Washington, DC, USA, 2006; pp.295-305.
[13]
Kulkarni PA, Whalley DB, Tyson GS, Davidson JW. Practical exhaustive optimization phase order exploration and evaluation. ACM Transactions on Architecture and Code Optimization 2009; Volume 6 Issue 1: pp.1-36.
[14]
Almagor L, Cooper KD, Grosul A, Harvey TJ, Reeves SW, Subramanian D, Torczon L, Waterman T. Finding effective compilation sequences. LCTES '04: Proceedings of the 2004 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems, Washington DC, United States, 2004; pp.231-239.
[15]
Hoste K, Eeckhout L. Cole: compiler optimization level exploration. Proceedings of the 6th annual IEEE/ACM International Symposium on Code Generation and Optimization, CGO '08, Boston, Massachusetts, United States, 2008; pp.165-174.
[16]
Hennessy JL, Gross T. Postpass code optimization of pipeline constraints. ACM Transactions on Programming Languages and Systems 1983; Volume 5 Issue 3: pp.422-448.
[17]
Whitfield D, Soffa ML. An approach to ordering optimizing transformations. Proceedings of the second ACM SIGPLAN symposium on Principles & Practice of Parallel Programming, Seattle, Washington, United States, 1990; pp.137-146.
[18]
Kulkarni PA, Jantz MR, Whalley DB. Improving both the performance benefits and speed of optimization phase sequence searches. Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, Compilers, and Tools for Embedded Systems, LCTES '10, Stockholm, Sweden, 2010; pp.95-104.
[19]
Guthaus MR, Ringenberg JS, Ernst D, Austin TM, Mudge T, Brown RB. MiBench: a free, commercially representative embedded benchmark suite. In IEEE 4th Annual Workshop on Workload Characterization, Washington DC, United States, December 2001; pp.3-14.
[20]
Kulkarni PA, Whalley DB, Tyson GS. Evaluating heuristic optimization phase order search algorithms. CGO '07: Proceedings of the International Symposium on Code Generation and Optimization, Washington DC, United States, 2007; pp.157-169.
[21]
Bodin F, Kisuki T, Knijnenburg P, O'Boyle M, Rohou E. Iterative compilation in a non-linear optimisation space. Workshop on Profile and Feedback Directed Compilation.Organized in conjuction with PACT'98, Paris, France, 1998.
[22]
Kulkarni P, Whalley D, Tyson G, Davidson J. Exhaustive optimization phase order space exploration. Proceedings of the Fourth Annual IEEE/ACM International Symposium on Code Generation and Optimization, Washington DC, United States, 2006; pp.306-308.
[23]
Haneda M, Knijnenburg PMW, Wijshoff HAG. Optimizing general purpose compiler optimization. In CF '05: Proceedings of the 2nd Conference on Computing Frontiers, ACM Press: New York, NY, USA, 2005; pp.180-188.
[24]
Burger D, Austin T. The SimpleScalar tool set, version 2.0. SIGARCH Computer Architecture News 1997; Volume 25 Issue 3: pp.13-25.
[25]
Cooper KD, Grosul A, Harvey TJ, Reeves S, Subramanian D, Torczon L, Waterman T. Acme: adaptive compilation made efficient. LCTES '05: Proceedings of the 2005 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems, Chicago, Illinois, United States, 2005; pp.69-77.
[26]
Davidson JW, Whalley DB. A design environment for addressing architecture and compiler interactions. Microprocessors and Microsystems 1991; Volume 15 Issue 9: pp.459-472.
[27]
Fleming PJ, Wallace JJ. How not to lie with statistics: the correct way to summarize benchmark results. Communications of the ACM 1986; Volume 29 Issue 3: pp.218-221.
[28]
Chen Y, Huang Y, Eeckhout L, Fursin G, Peng L, Temam O, Wu C. Evaluating iterative optimization across 1000 datasets. In Proceedings of the 2010 ACM SIGPLAN conference on Programming Language Design and Implementation, <bookSeriesTitle>PLDI '10</bookSeriesTitle>. ACM: New York, NY, USA, 2010; pp.448-459.
[29]
Haneda M, Knijnenburg PMW, Wijshoff HAG. On the impact of data input sets on statistical compiler tuning. In Proceedings of the 20th International Conference on Parallel and Distributed Processing, <bookSeriesTitle>IPDPS'06</bookSeriesTitle>. IEEE Computer Society: Washington, DC, USA, 2006; pp.385-385.
[30]
Gibbons PB, Muchnick SS. Efficient instruction scheduling for a pipelined architecture. Proceedings of the SIGPLAN '86 Conference on Programming Language Design and Implementation, Palo Alto, California, United States, 1986; pp.11-16.
[31]
Briggs P, Cooper KD, Torczon L. Improvements to graph coloring register allocation. ACM Transactions on Programming Languages and Systems May 1994; Volume 16: pp.428-455.
[32]
George L, Appel AW. Iterated register coalescing. ACM Transactions on Programming Languages and Systems May 1996; Volume 18: pp.300-324.
[33]
Sanchez R, Amaral J, Szafron D, Pirvu M, Stoodley M. Using machines to learn method-specific compilation strategies. 2011 9th Annual IEEE/ACM International Symposium on Code Generation and Optimization CGO, Washington DC, United States, 2011; pp.257-266.
[34]
Kisuki T, Knijnenburg P, O'Boyle M. Combined selection of tile sizes and unroll factors using iterative compilation. Internation Conference on Parallel Architectures and Compilation Techniques, Philadelphia, Pennsylvania, United States, 2000; pp.237-246.
[35]
Box GEP, Hunter WG, Hunter JS. Statistics for Experimenters: An Introduction to Design, Data Analysis, and Model Building, 1 edn., John Wiley & Sons, Hoboken, New Jersey, United States, 1978.
[36]
Haneda M, Knijnenburg PMW, Wijshoff HAG. Automatic selection of compiler options using non-parametric inferential statistics. In PACT '05: Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques. IEEE Computer Society: Washington, DC, USA, 2005; pp.123-132.
[37]
Kulkarni P, Hines S, Hiser J, Whalley D, Davidson J, Jones D, Fast searches for effective optimization phase sequences. Proceedings of the ACM SIGPLAN '04 Conference on Programming Language Design and Implementation, Washington DC, USA, 2004; pp.171-182.
[38]
Fursin G, Cohen A, O'Boyle M, Temam O. Quick and practical run-time evaluation of multiple program optimizations. Transactions on High-Performance Embedded Architectures and Compilers I, Berlin, Heidelberg, 2007; pp.34-53.
[39]
Stephenson M, Amarasinghe S, Martin M, O'Reilly UM. Meta optimization: improving compiler heuristics with machine learning. In Proceedings of the ACM SIGPLAN 2003 Conference on Programming Language Design and Implementation, <bookSeriesTitle>PLDI '03</bookSeriesTitle>. ACM: New York, NY, USA, 2003; pp.77-90.
[40]
Fursin G, Miranda C, Temam O, Namolaru M, Yom-Tov E, Zaks A, Mendelson B, Bonilla E, Thomson J, Leather H, Williams C, Boyle MO. MILEPOST GCC: machine learning based research compiler. GCC Summit June 2008. Available from: "http://ctuning.org/milepost-gcc" [accessed on December 2012].
[41]
Stephenson M, Amarasinghe S. Predicting unroll factors using supervised classification. In Proceedings of the international symposium on Code Generation and Optimization, <bookSeriesTitle>CGO '05</bookSeriesTitle>. IEEE Computer Society: Washington, DC, USA, 2005; pp.123-134.
[42]
Cavazos J, O'Boyle MFP. Method-specific dynamic compilation using logistic regression. In Proceedings of the 21st Annual ACM SIGPLAN Conference on Object-oriented Programming Systems, Languages, and Applications, <bookSeriesTitle>OOPSLA '06</bookSeriesTitle>. ACM: New York, NY, USA, 2006; pp.229-240.
[43]
Leverett BW, Cattell RGG, Hobbs SO, Newcomer JM, Reiner AH, Schatz BR, Wulf WA. An overview of the Production-Quality Compiler-Compiler project. Computer 1980; Volume 13 Issue 8: pp.38-49.
[44]
Pinter SS. Register allocation with instruction scheduling. In PLDI '93: Proceedings of the ACM SIGPLAN 1993 Conference on Programming Language Design and Implementation, ACM: New York, NY, USA, 1993; pp.248-257.
[45]
Ambrosch W, Ertl MA, Beer F, Krall A, Anton M, Felix E, Krall BA. Dependence-conscious global register allocation. In Proceedings of PLSA, Springer-Verlag New York, Inc.: Zurich, Switzerland, 1994; pp.125-136.
[46]
Click C, Cooper KD. Combining analyses, combining optimizations. ACM Transactions on Programming Languages and Systems 1995; Volume 17: pp.181-196.
[47]
GNU. The internals of the gnu compilers, 2011. Available from: "http://gcc.gnu.org/onlinedocs/gccint/" [accessed on December 2012].
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Published: 01 June 2014
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