article

Accelerating colour space conversion on reconfigurable hardware

Authors:

A. AmiraAuthors Info & Claims

Image and Vision Computing, Volume 23, Issue 11

Pages 935 - 942

https://doi.org/10.1016/j.imavis.2005.03.006

Published: 01 October 2005 Publication History

Abstract

Colour space conversion is very important in many types of image processing applications including video compression. This operation consumes up to 40% of the entire processing power of a highly optimised decoder. Therefore, techniques which efficiently implement this conversion are desired. This paper presents two novel architectures for efficient implementation of a Colour Space Converter (CSC) suitable for Field Programmable Gate Array (FPGAs) and VLSI. The proposed architectures are based on Distributed Arithmetic (DA) ROM accumulator principles. The architectures have been implemented and verified using the Celoxica RC1000 FPGA development board. In addition, they are platform independent and have a low latency (eight cycles). The first architecture has a throughput of height, while the second one is fully pipelined and has a throughput of one and capable of sustained data rate of over 234 mega-conversions/s.

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Cited By

López SSarmiento RPotter PLuk WCheung PDe Micheli GAl-Hashimi BMueller WMacii E(2010)Exploration of hardware sharing for image encodersProceedings of the Conference on Design, Automation and Test in Europe10.5555/1870926.1871346(1737-1742)Online publication date: 8-Mar-2010
https://dl.acm.org/doi/10.5555/1870926.1871346
Shahbahrami AJuurlink BVassiliadis S(2008)Versatility of extended subwords and the matrix register fileACM Transactions on Architecture and Code Optimization10.1145/1369396.13694015:1(1-30)Online publication date: 29-May-2008
https://dl.acm.org/doi/10.1145/1369396.1369401
López MFernández-Caballero AFernández MMira JDelgado A(2007)Algorithmic lateral inhibition formal model for real-time motion detectionProceedings of the 11th international conference on Computer aided systems theory10.5555/1783034.1783122(638-645)Online publication date: 12-Feb-2007
https://dl.acm.org/doi/10.5555/1783034.1783122
Show More Cited By

Accelerating colour space conversion on reconfigurable hardware
1. Hardware
  1. Very large scale integration design
    1. Application-specific VLSI designs

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Published In

cover image Image and Vision Computing

Image and Vision Computing Volume 23, Issue 11

October, 2005

94 pages

ISSN:0262-8856

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Copyright © Elsevier B.V. © 2005.

Publisher

Butterworth-Heinemann

United States

Publication History

Published: 01 October 2005

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Cited By

López SSarmiento RPotter PLuk WCheung PDe Micheli GAl-Hashimi BMueller WMacii E(2010)Exploration of hardware sharing for image encodersProceedings of the Conference on Design, Automation and Test in Europe10.5555/1870926.1871346(1737-1742)Online publication date: 8-Mar-2010
https://dl.acm.org/doi/10.5555/1870926.1871346
Shahbahrami AJuurlink BVassiliadis S(2008)Versatility of extended subwords and the matrix register fileACM Transactions on Architecture and Code Optimization10.1145/1369396.13694015:1(1-30)Online publication date: 29-May-2008
https://dl.acm.org/doi/10.1145/1369396.1369401
López MFernández-Caballero AFernández MMira JDelgado A(2007)Algorithmic lateral inhibition formal model for real-time motion detectionProceedings of the 11th international conference on Computer aided systems theory10.5555/1783034.1783122(638-645)Online publication date: 12-Feb-2007
https://dl.acm.org/doi/10.5555/1783034.1783122
Amira AChandrasekaran S(2007)Power modeling and efficient FPGA implementation of FHT for signal processingIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2007.89360615:3(286-295)Online publication date: 1-Mar-2007
https://dl.acm.org/doi/10.1109/TVLSI.2007.893606

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