research-article

Novel Totally Self-Checking Berger Code Checker Designs Based on Generalized Berger Code Partitioning

Authors:

J. C. LoAuthors Info & Claims

IEEE Transactions on Computers, Volume 42, Issue 8

Pages 1020 - 1024

https://doi.org/10.1109/12.238498

Published: 01 August 1993 Publication History

Abstract

Totally self-checking (TSC) Berger code checker designs are presented. The generalized Berger check partitioning is derived. It is proven that a TSC Berger code checker can be constructed from a TSC m-out-of-n checker. For a TSC Berger code checker design, no two-output checker exists for information length 2/sup r-1/, for any positive nonzero r. The presented approach solves this open problem.

References

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{1} J. M. Berger, "A note on an error detection code for asymmetric channels," Inform. Contr., pp. 68-73, Mar. 1961.

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{2} C. V. Freiman, "Optimal error detecting codes for asymmetric binary channels," Inform. Contr., pp. 64-71, Mar. 1962.

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{3} M. J. Ashjaee and S. M. Reddy, "Totally self-checking checkers for a class of separable codes," in Proc. 12th Annu. Allerton Conf. Circuit and System Theory, Oct. 1974, pp. 238-242.

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{4} M. J. Ashjaee, "Totally self-checking check circuits for separable codes," Ph.D. dissertation, Univ. Iowa, 1976.

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{5} M. J. Ashjaee and S. M. Reddy, "On totally self-checking checkers for separable codes," IEEE Trans. Comput., vol. C-26, no. 8, pp. 737-744, Aug. 1977.

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{6} M. A. Marouf and D. A. Friedman, "Design of self-checking checkers for Berger codes," in Proc. 8th Symp. Fault-Tolerant Comput., June 1978, pp. 179-184.

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{7} S. J. Piestrak, "Design of fast self-testing checkers for a class of Berger codes," IEEE Trans. Comput., vol. C-36, no. 5, pp. 629-634, May 1987.

Digital Library

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{8} J. C. Lo and S. Thanawastien, "The design of fast totally self-checking Berger code checkers based on Berger code partitioning," in Proc. FTCS-19, June 1988, pp. 226-231.

[9]

{9} S. J. Piestrak, "The minimal test set for sorting networks and the use of sorting networks in self-testing checkers for unordered codes," in Proc. FTCS-20, June 1990, pp. 457-464.

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{10} D. A. Anderson, "Design of self-checking digital networks using coding techniques," Coordinated Sci. Lab., Univ. Illinois, Urbana-Chanpaign, Rep. R-527, 1971.

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{11} Y. Tamir and C. H. Sequin, "Design and applications of self-testing comparators implemented with MOS PEA's," IEEE Trans Comput., vol. C-33, pp. 493-506, June 1984.

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{12} A. M. Paschalis, D. Nikolos, and C. Halatsis, "Efficient modular design of TSC checkers for M-out-of-2M codes," IEEE Trans. Comput., vol. 37, no. 3, pp. 301-309, Mar. 1988.

Digital Library

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{13} D. A. Anderson and G. Metze, "Design of totally self-checking check circuits for m-out-of-n codes," IEEE Trans. Comput., vol. C-22, no. 3, pp. 263-269, Mar. 1973.

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{14} S. M. Reddy and J. R. Wilson, "Easily testable cellular realization for the (exactly p)-out-of-n and (p or more)-out-of-n logic functions," IEEE Trans. Comput., vol. C-23, no. 1, pp. 98-100, Jan. 1974.

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{15} J. E. Smith, "The design of totally self-checking circuits for a class of unordered codes," J. Des. Autom. Fault-Tolerant Comput., pp. 321-342, Oct. 1977.

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{16} T. R. N. Rao and E. Fujiwara, Error-Control Coding for Computer Systems. Englewood Cliffs, NJ: Prentice-Hall, 1989.

Digital Library

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{17} J. C. Lo, S. Thanawastien, T. R. N. Rao, and M. Nicolaidis, "An SFS Berger check prediction ALU and its application to self-checking processor designs," IEEE Trans. Comput. Aided Design, vol. 11, no. 4, Apr. 1992.

Digital Library

Cited By

Mohammadi SOmidi RLotfinejad M(2020)Low-Power Area-Efficient Fault Tolerant Adder in Current Mode Multi Valued Logic Using Berger CodesJournal of Electronic Testing: Theory and Applications10.1007/s10836-020-05887-036:4(555-563)Online publication date: 1-Aug-2020
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Zhang RJha NQu GIsmail YNarayanan VZhou H(2006)Threshold/majority logic synthesis and concurrent error detection targeting nanoelectronic implementationsProceedings of the 16th ACM Great Lakes symposium on VLSI10.1145/1127908.1127913(8-13)Online publication date: 30-Apr-2006
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Published In

cover image IEEE Transactions on Computers

IEEE Transactions on Computers Volume 42, Issue 8

August 1993

133 pages

ISSN:0018-9340

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Copyright © Copyright © 1993 IEEE. All Rights Reserved.

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IEEE Computer Society

United States

Publication History

Published: 01 August 1993

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Cited By

Mohammadi SOmidi RLotfinejad M(2020)Low-Power Area-Efficient Fault Tolerant Adder in Current Mode Multi Valued Logic Using Berger CodesJournal of Electronic Testing: Theory and Applications10.1007/s10836-020-05887-036:4(555-563)Online publication date: 1-Aug-2020
https://dl.acm.org/doi/10.1007/s10836-020-05887-0
Omidi RZarrabi H(2018)New Protection Technique Against Unidirectional MEUs for FIR FiltersCircuits, Systems, and Signal Processing10.1007/s00034-017-0556-z37:1(367-382)Online publication date: 1-Jan-2018
https://dl.acm.org/doi/10.1007/s00034-017-0556-z
Zhang RJha NQu GIsmail YNarayanan VZhou H(2006)Threshold/majority logic synthesis and concurrent error detection targeting nanoelectronic implementationsProceedings of the 16th ACM Great Lakes symposium on VLSI10.1145/1127908.1127913(8-13)Online publication date: 30-Apr-2006
https://dl.acm.org/doi/10.1145/1127908.1127913
Tarnick S(2005)Single- and Double-Output Embedded Checker Architectures for Systematic Unordered Codes"Journal of Electronic Testing: Theory and Applications10.1007/s10836-005-0973-y21:4(391-404)Online publication date: 1-Aug-2005
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Piestrak S(2002)Comments on 'Novel Totally Self-Checking Berger Checker Designs Based on Generalized Berger Code Partitioning'IEEE Transactions on Computers10.1109/TC.2002.100915651:6(735-736)Online publication date: 1-Jun-2002
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Piestrak S(2002)Design Method of a Class of Embedded Combinational Self-Testing Checkers for Two-Rail CodesIEEE Transactions on Computers10.1109/12.98001051:2(229-234)Online publication date: 1-Feb-2002
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Metra CLo J(2000)Intermediacy Prediction for High Speed Berger Code CheckersJournal of Electronic Testing: Theory and Applications10.1023/A:100836920322316:6(607-615)Online publication date: 1-Dec-2000
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Stroele ATarnick S(1999)Programmable Embedded Self-Testing Checkers for All-Unidirectional Error-Detecting CodesProceedings of the 1999 17TH IEEE VLSI Test Symposium10.5555/832299.836497Online publication date: 26-Apr-1999
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Chang WWu C(1999)Low-Cost Modular Totally Self-Checking Checker Design for $m$-out-of-$n$ CodeIEEE Transactions on Computers10.1109/12.79512348:8(815-826)Online publication date: 1-Aug-1999
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Rao TFeng GKolluru MLo J(1994)Correction to "Novel Totally Self-Checking Berger Code Checker Designs Based on Generalized Berger Code Partitioning"IEEE Transactions on Computers10.5555/626506.62691643:5(640)Online publication date: 1-May-1994
https://dl.acm.org/doi/10.5555/626506.626916

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