Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
skip to main content
research-article

Quasi-Universal Switch Matrices for FPD Design

Published: 01 October 1999 Publication History

Abstract

An FPD switch module $M$ with $w$ terminals on each side is said to be universal if every set of nets satisfying the dimension constraint (i.e., the number of nets on each side of $M$ is at most $w$) is simultaneously routable through $M$ [8]. Chang et al. have identified a class of universal switch blocks in [8]. In this paper, we consider the design and routing problems for another popular model of switch modules called switch matrices. Unlike switch blocks, we prove that there exist no universal switch matrices. Nevertheless, we present quasi-universal switch matrices which have the maximum possible routing capacities among all switch matrices of the same size and show that their routing capacities converge to those of universal switch blocks. Each of the quasi-universal switch matrices of size $w$ has a total of only $14w-20$ ($14w-21$) switches if $w$ is even (odd), $w>1$, compared to a fully populated one which has $3w^2-2w$ switches. We prove that no switch matrix with less than $14w-20$ ($14w-21$) switches can be quasi-universal. Experimental results demonstrate that the quasi-universal switch matrices improve routabilty at the chip level.

References

[1]
Actel Corp., FPGA Data Book and Design Guide, 1996.
[2]
Altera Corp., FLEX 10K Handbook, 1996.
[3]
Aptix Inc., FPIC AX1024D, Preliminary Data Sheet, Aug. 1992.
[4]
AT&T Microelectronics, AT&T Field-Programmable Gate Arrays Data Book, Apr. 1995.
[5]
N. Bhat and D. Hill, “Routable Technology Mapping for LUT FPGAs,” Proc. IEEE Int'l Conf. Computer Design, pp. 95-98, 1992.
[6]
S.D. Brown J. Rose and Z.G. Vranesic, “A Stochastic Model to Predict the Routability of Field-Programmable Gate Arrays,” IEEE Trans. Computer-Aided Design, vol. 12, no. 12, pp. 1,827-1,838, Dec. 1993.
[7]
Y.-W. Chang D.F. Wong and C.K. Wong, “Design and Analysis of FPGA/FPIC Switch Modules,” Proc. IEEE Int'l Conf. Computer Design, pp. 394-401, Austin, Tex., Oct. 1995.
[8]
Y.-W. Chang D.F. Wong and C.K. Wong, “Universal Switch Modules for FPGA Design,” ACM Trans. Design Automation of Electronic Systems, vol. 1, no. 1, pp. 80-101, Jan. 1996.
[9]
A. El Gamal, et al., “An Architecture for Electrically Configurable Gate Arrays,” IEEE J. Solid-State Circuits, vol. 24, no. 2, pp. 394-398, Apr. 1989.
[10]
J.L. Hennessy and D.A. Patterson, Computer Architecture: A Quantitative Approach, second ed. Morgan Kaufmann, 1996.
[11]
H.C. Hsieh, et al., “Third-Generation Architecture Boosts Speed and Density of Field-Programmable Gate Arrays,” Proc. IEEE Custom Integrated Circuits Conf., pp. 31.2.1-31.2.7, May 1990.
[12]
R.M. Karp, “Combinatorics, Complexity, andRandomness,” Comm. ACM, vol. 29, no. 2, pp. 98-109, 1986.
[13]
C.Y. Lee, “An Algorithm for Path Connections and Its Applications,” IRE Trans. Electronic Computers, vol. 10, pp. 346-365, Sept. 1961.
[14]
G.G. Lemienx and S.D. Brown, “A Detailed Routing Algorithm for Allocating Wire Segments in Field-Programmable Gate Arrays,” Proc. ACM/SIGDA Physical Design Workshop, pp. 215-216, Lake Arrowhead, Calif., 1993.
[15]
J. Rose and S. Brown, “Flexibility of Interconnection Structures for Field-Programmable Gate Arrays,” IEEE J. Solid State Circuits, vol. 26, no. 3, pp. 277-282, Mar. 1991.
[16]
Y. Sun T.-C. Wang C.K. Wong and C.L. Liu, “Routing for Symmetric FPGAs and FPICs,” Proc. IEEE/ACM Int'l Conf. Computer-Aided Design, pp. 486-490, Santa Clara, Calif., Nov. 1993.
[17]
S. Trimberger and M. Chene, “Placement-Based Partitioning for Lookup-Table-Based FPGA,” Proc. IEEE Int'l Conf. Computer Design, pp. 91-94, 1992.
[18]
Xilinx Inc., The Programmable Logic Data Book, 1996.
[19]
K. Zhu D.F. Wong and Y.-W. Chang, “Switch Module Design with Application to Two-Dimensional Segmentation Design,” Proc. IEEE/ACM Int'l Conf. Computer-Aided Design, pp. 481-486, Santa Clara, Calif., Nov. 1993.

Cited By

View all
  • (2005)Crossbar based design schemes for switch boxes and programmable interconnection networksProceedings of the 2005 Asia and South Pacific Design Automation Conference10.1145/1120725.1121068(910-915)Online publication date: 18-Jan-2005

Index Terms

  1. Quasi-Universal Switch Matrices for FPD Design

    Recommendations

    Comments

    Information & Contributors

    Information

    Published In

    cover image IEEE Transactions on Computers
    IEEE Transactions on Computers  Volume 48, Issue 10
    October 1999
    145 pages
    ISSN:0018-9340
    Issue’s Table of Contents

    Publisher

    IEEE Computer Society

    United States

    Publication History

    Published: 01 October 1999

    Author Tags

    1. Analysis
    2. architecture
    3. design
    4. digital
    5. gate array
    6. programmable logic array.

    Qualifiers

    • Research-article

    Contributors

    Other Metrics

    Bibliometrics & Citations

    Bibliometrics

    Article Metrics

    • Downloads (Last 12 months)0
    • Downloads (Last 6 weeks)0
    Reflects downloads up to 09 Nov 2024

    Other Metrics

    Citations

    Cited By

    View all
    • (2005)Crossbar based design schemes for switch boxes and programmable interconnection networksProceedings of the 2005 Asia and South Pacific Design Automation Conference10.1145/1120725.1121068(910-915)Online publication date: 18-Jan-2005

    View Options

    View options

    Media

    Figures

    Other

    Tables

    Share

    Share

    Share this Publication link

    Share on social media