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Shared Memory Consistency Models: A Tutorial

Published: 01 December 1996 Publication History
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  • Abstract

    The shared memory programming model has several advantages over the message-passing model. To write correct and efficient shared memory programs, programmers need a precise notion of shared memory semantics. The memory consistency model of a shared memory multiprocessor formally specifies how the memory system will appear to the programmer. The memory consistency model is an interface between the programmer and the system, so it influences not only how parallel programs are written but virtually every aspect of parallel hardware and software design. A memory consistency model specification is required at every interface between the programmer and the system. At each level, the memory consistency model affects both programmability and performance. Furthermore, due to a lack of consensus on a single model, portability can be affected when moving software across systems supporting different models. Unfortunately, the vast literature that describes consistency models uses nonuniform, complex terminology to describe the large variety of models. This makes it difficult to understand the often subtle but important differences among models and leads to several misconceptions. This article describes memory consistency models in a way that most computer professionals can understand. The focus is consistency models proposed for hardware-based shared memory systems. Most of these models emphasize the system optimizations they support, and the authors retain this system-centric emphasis in this article.

    References

    [1]
    L. Lamport, "How to Make a Multiprocessor Computer that Correctly Executes Multiprocess Programs," IEEE Trans. Computers, Sept. 1979, pp. 690-691.]]
    [2]
    IBM System/370 Principles of Operation, IBM Pub. GA22-7000-9, File S370-01, 1983.]]
    [3]
    SPARC Architecture Manual, D.L. Weaver and T. Germond, eds., Prentice-Hall, Englewood Cliffs, N.J. 1994.]]
    [4]
    K. Gharachorloo, et al., "Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors," Proc. 17th Int'l Symp. Computer Architecture, 1990, pp. 15-26.]]
    [5]
    M. Dubois, C. Scheurich, and F. Briggs, "Memory Access Buffering in Multiprocessors," Proc. 13th Int'l Symp. Computer Architecture, IEEE CS Press, Los Alamitos, Calif., 1986, pp. 434-442.]]
    [6]
    Alpha AXP Architecture Reference Manual 2nd Ed., R.L. Sites and R.T. Witek, eds., Digital Press, Boston 1995.]]
    [7]
    The PowerPC Architecture: A Specification for a New Family of RISC Processors, C. May, et al., eds., Morgan Kaufmann, San Francisco, 1994.]]
    [8]
    S.V. Adve, Designing Memory Consistency Models for Shared Memory Multiprocessors, PhD thesis, Tech. Report 1198, CS Department, Univ. of Wisconsin, Madison, 1993.]]
    [9]
    K. Gharachorloo, et al., "Specifying System Requirements for Memory Consistency Models," Tech. Report CSL-TR-93-594, Stanford Univ., 1993.]]
    [10]
    K. Gharachorloo, Memory Consistency Models for Shared Memory Multiprocessors, PhD thesis, Tech. Report CSL-TR-95-685, Stanford Univ., 1995.]]
    [11]
    L. Lamport, "How to Make a Multiprocessor Computer That Correctly Executes Multiprocess Programs," IEEE Trans. Computers, Sept. 1979, pp. 690-691.]]
    [12]
    K. Gharachorloo, et al., "Memory Consistency and Event Ordering in Scalable Shared Memory Multiprocessors," Proc. 17th Int'l Symp. Computer Architecture, IEEE CS Press, Los Alamitos, Calif., 1990, pp. 15-26.]]
    [13]
    K. Gharachorloo A. Gupta and J.L. Hennessy, "Two Techniques to Enhance the Performance of Memory Consistency Models," Proc. Int'l Conf. Parallel Processing, The Pennsylvania State Univ. Press, University Park, Penn., 1991, pp. 355-364.]]
    [14]
    V.S. Pai, et al., "An Evaluation of Memory Consistency Models for Shared Memory Systems with ILP Processors," Proc. 7th Int'l Conf. on Architectural Support for Programming Languages and Operating Systems, ACM Press, New York, 1996, pp. 12-23]]
    [15]
    D. Shasha and M. Snir, "Efficient Correct Execution of Parallel Programs That Share Memory," ACM Trans. Programming Languages and Systems, Apr. 1988, pp. 282-312.]]
    [16]
    A. Krishnamurthy and K. Yelick, "Optimizing Parallel SPMD Programs," in Workshop on Languages and Compilers for Parallel Computing, Ithaca, New York, 1994.]]
    [17]
    K. Gharachorloo A. Gupta and J.L. Hennessy, "Performance Evaluation of Memory Consistency Models for Shared memory Multiprocessors," Proc. Fourth Int'l Conf. Architectural Support for Programming Languages and Operating Systems, ACM Press, New York, 1991, pp. 245-257.]]
    [18]
    R.N. Zucker and J.-L. Baer, "A Performance Study of Memory Consistency Models," Proc. 19th Ann. Int'l Symp. on Computer Architecture, ACM Press, New York, 1992, pp. 2-12.]]
    [19]
    S.V. Adve and M.D. Hill, "Weak Ordering—A New Definition," Proc. 17th Symp. Computer Architecture, IEEE CS Press, Los Alamitos, Calif., 1990, pp. 2-14.]]

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    Published In

    cover image Computer
    Computer  Volume 29, Issue 12
    December 1996
    107 pages

    Publisher

    IEEE Computer Society Press

    Washington, DC, United States

    Publication History

    Published: 01 December 1996

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