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Energy minimization using multiple supply voltages

Published: 01 December 1997 Publication History

Abstract

We present a dynamic programming technique for solving the multiple supply voltage scheduling problem in both nonpipelined and functionally pipelined data-paths. The scheduling problem refers to the assignment of a supply voltage level (selected from a fixed and known number of voltage levels) to each operation in a data flow graph so as to minimize the average energy consumption for given computation time or throughput constraints or both. The energy model is accurate and accounts for the input pattern dependencies, re-convergent fanout induced dependencies, and the energy cost of level shifters. Experimental results show that using three supply voltage levels on a number of standard benchmarks, an average energy saving of 40.19% (with a computation time constraint of 1.5 times the critical path delay) can be obtained compared to using a single supply voltage level.

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  • (2019)Group influence based improved firefly algorithm for Design Space Exploration of Datapath resource allocationApplied Intelligence10.1007/s10489-018-1371-349:6(2084-2100)Online publication date: 1-Jun-2019
  • (2016)Multi-supply voltage (MSV) driven SoC floorplanning for fast design convergenceIntegration, the VLSI Journal10.1016/j.vlsi.2015.09.00252:C(335-346)Online publication date: 1-Jan-2016
  • (2015)A Novel Static D-Flip-Flop Topology for Low Swing ClockingProceedings of the 25th edition on Great Lakes Symposium on VLSI10.1145/2742060.2742095(301-306)Online publication date: 20-May-2015
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Published In

cover image IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems  Volume 5, Issue 4
Special issue on low power electronics and design
Dec. 1997
148 pages
ISSN:1063-8210
  • Editor:
  • Bing Sheu
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IEEE Educational Activities Department

United States

Publication History

Published: 01 December 1997

Author Tags

  1. dynamic programming
  2. energy minimization
  3. functional pipelining
  4. multiple supply voltages
  5. scheduling

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Cited By

View all
  • (2019)Group influence based improved firefly algorithm for Design Space Exploration of Datapath resource allocationApplied Intelligence10.1007/s10489-018-1371-349:6(2084-2100)Online publication date: 1-Jun-2019
  • (2016)Multi-supply voltage (MSV) driven SoC floorplanning for fast design convergenceIntegration, the VLSI Journal10.1016/j.vlsi.2015.09.00252:C(335-346)Online publication date: 1-Jan-2016
  • (2015)A Novel Static D-Flip-Flop Topology for Low Swing ClockingProceedings of the 25th edition on Great Lakes Symposium on VLSI10.1145/2742060.2742095(301-306)Online publication date: 20-May-2015
  • (2013)Low-power timing closure methodology for ultra-low voltage designsProceedings of the International Conference on Computer-Aided Design10.5555/2561828.2561964(697-704)Online publication date: 18-Nov-2013
  • (2013)A clock control strategy for peak power and RMS current reduction using path clusteringIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2012.218698921:2(259-269)Online publication date: 1-Feb-2013
  • (2013)Design of an integrated single-input dual-output 3-switch buck converter based on sliding mode controlAnalog Integrated Circuits and Signal Processing10.1007/s10470-013-0039-576:3(307-319)Online publication date: 1-Sep-2013
  • (2012)HLS-dvIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2011.212231020:4(593-604)Online publication date: 1-Apr-2012
  • (2011)The approximation scheme for peak power driven voltage partitioningProceedings of the International Conference on Computer-Aided Design10.5555/2132325.2132486(736-741)Online publication date: 7-Nov-2011
  • (2011)An approach to energy-error tradeoffs in approximate ripple carry addersProceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design10.5555/2016802.2016853(211-216)Online publication date: 1-Aug-2011
  • (2011)Hardware-Software Codesign of an Embedded Multiple-Supply Power Management Unit for Multicore SoCs Using an Adaptive Global/Local Power Allocation and Processing SchemeACM Transactions on Design Automation of Electronic Systems10.1145/1970353.197036416:3(1-27)Online publication date: 1-Jun-2011
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