Article

Compressing Functional Tests for Microprocessors

Authors:

Kedarnath J. Balakrishnan,

Nur A. Touba,

Srinivas PatilAuthors Info & Claims

ATS '05: Proceedings of the 14th Asian Test Symposium on Asian Test Symposium

Pages 428 - 433

https://doi.org/10.1109/ATS.2005.38

Published: 18 December 2005 Publication History

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Abstract

In the past, test data volume reduction techniques have concentrated heavily on scan test data content. However, functional vectors continue to be utilized because they target unique defects and failure modes. Hence, functional vector compression can help alleviate the cost of functional test. Scan vector compression techniques are generally unsuitable in the functional domain and techniques specially tailored for functional test compression are required. Additionally, it may be possible to perform compression and decompression using software techniques without incurring the overhead of dedicated hardware. This paper proposes a set of software techniques targeted towards functional test compression.

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Yilmaz MChakrabarty KBenini LDe Micheli GAl-Hashimi BMueller W(2009)Seed selection in LFSR-reseeding-based test compression for the detection of small-delay defectsProceedings of the Conference on Design, Automation and Test in Europe10.5555/1874620.1874976(1488-1493)Online publication date: 20-Apr-2009
https://dl.acm.org/doi/10.5555/1874620.1874976
Vishnoi APanda PBalakrishnan MBenini LDe Micheli GAl-Hashimi BMueller W(2009)Cache aware compression for processor debug supportProceedings of the Conference on Design, Automation and Test in Europe10.5555/1874620.1874670(208-213)Online publication date: 20-Apr-2009
https://dl.acm.org/doi/10.5555/1874620.1874670
Vishnoi APanda PBalakrishnan M(2009)Online cache state dumping for processor debugProceedings of the 46th Annual Design Automation Conference10.1145/1629911.1630007(358-363)Online publication date: 26-Jul-2009
https://dl.acm.org/doi/10.1145/1629911.1630007
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Compressing Functional Tests for Microprocessors
1. Hardware

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ATS '05: Proceedings of the 14th Asian Test Symposium on Asian Test Symposium

December 2005

450 pages

ISBN:0769524818

Publisher

IEEE Computer Society

United States

Publication History

Published: 18 December 2005

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Yilmaz MChakrabarty KBenini LDe Micheli GAl-Hashimi BMueller W(2009)Seed selection in LFSR-reseeding-based test compression for the detection of small-delay defectsProceedings of the Conference on Design, Automation and Test in Europe10.5555/1874620.1874976(1488-1493)Online publication date: 20-Apr-2009
https://dl.acm.org/doi/10.5555/1874620.1874976
Vishnoi APanda PBalakrishnan MBenini LDe Micheli GAl-Hashimi BMueller W(2009)Cache aware compression for processor debug supportProceedings of the Conference on Design, Automation and Test in Europe10.5555/1874620.1874670(208-213)Online publication date: 20-Apr-2009
https://dl.acm.org/doi/10.5555/1874620.1874670
Vishnoi APanda PBalakrishnan M(2009)Online cache state dumping for processor debugProceedings of the 46th Annual Design Automation Conference10.1145/1629911.1630007(358-363)Online publication date: 26-Jul-2009
https://dl.acm.org/doi/10.1145/1629911.1630007
Gurumurthy SVemu RAbraham JNatarajan SNarayanan VYan ZMacii EBhanja S(2008)On efficient generation of instruction sequences to test for delay defects in a processorProceedings of the 18th ACM Great Lakes symposium on VLSI10.1145/1366110.1366178(279-284)Online publication date: 4-May-2008
https://dl.acm.org/doi/10.1145/1366110.1366178

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Functional and partially-functional skewed-load tests

Low-power skewed-load tests based on functional broadside tests

On Functional Broadside Tests With Functional Propagation Conditions

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