research-article

Advanced datapath synthesis using graph isomorphism

Authors:

Mihir Choudhury,

Andrew Sullivan,

Maciej CiesielskiAuthors Info & Claims

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)

Pages 424 - 429

https://doi.org/10.1109/ICCAD.2017.8203808

Published: 13 November 2017 Publication History

Abstract

This paper presents an advanced DAG-based algorithm for datapath synthesis that targets area minimization using logic-level resource sharing. The problem of identifying common specification logic is formulated using unweighted graph isomorphism problem, in contrast to a weighted graph isomorphism using AIGs. In the context of gate-level datapath circuits, our algorithm solves the unweighted graph isomorphism problem in linear time. The experiments are conducted within an industrial synthesis flow that includes the complete high-level synthesis, logic synthesis and placement and route procedures. Experimental results show a significant runtime improvements compared to the existing datapath synthesis algorithms.

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Cited By

H C PRao MSavidis ISasan AThapliyal HDeMara R(2022)Evolutionary Standard Cell Synthesis of Unconventional DesignsProceedings of the Great Lakes Symposium on VLSI 202210.1145/3526241.3530353(189-192)Online publication date: 6-Jun-2022
https://dl.acm.org/doi/10.1145/3526241.3530353

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2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)

Nov 2017

1049 pages

Copyright © 2017.

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IEEE Press

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Published: 13 November 2017

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Cited By

H C PRao MSavidis ISasan AThapliyal HDeMara R(2022)Evolutionary Standard Cell Synthesis of Unconventional DesignsProceedings of the Great Lakes Symposium on VLSI 202210.1145/3526241.3530353(189-192)Online publication date: 6-Jun-2022
https://dl.acm.org/doi/10.1145/3526241.3530353

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