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From GPGPU to Many-Core: Nvidia Fermi and Intel Many Integrated Core Architecture

Authors:

Alexander Heinecke,

Michael Klemm,

Hans-Joachim BungartzAuthors Info & Claims

Computing in Science and Engineering, Volume 14, Issue 2

Pages 78 - 83

https://doi.org/10.1109/MCSE.2012.23

Published: 01 March 2012 Publication History

Abstract

Comparing the architectures and performance levels of an Nvidia Fermi accelerator with an Intel MIC Architecture coprocessor demonstrates the benefit of the coprocessor for bringing highly parallel applications into, or even beyond, GPGPU performance regions.

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Fang JZhang XLiu SChang Z(2019)Miss-aware LLC buffer management strategy based on heterogeneous multi-coreThe Journal of Supercomputing10.1007/s11227-019-02763-375:8(4519-4528)Online publication date: 1-Aug-2019
https://dl.acm.org/doi/10.1007/s11227-019-02763-3
Tagliavini GHaugou GMarongiu ABenini L(2018)Optimizing memory bandwidth exploitation for OpenVX applications on embedded many-core acceleratorsJournal of Real-Time Image Processing10.1007/s11554-015-0544-015:1(73-92)Online publication date: 1-Jun-2018
https://dl.acm.org/doi/10.1007/s11554-015-0544-0
Tarakji ABörger LLeupers RKaeli DCavazos J(2015)A comparative investigation of device-specific mechanisms for exploiting HPC acceleratorsProceedings of the 8th Workshop on General Purpose Processing using GPUs10.1145/2716282.2716293(1-12)Online publication date: 7-Feb-2015
https://dl.acm.org/doi/10.1145/2716282.2716293
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cover image Computing in Science and Engineering

Computing in Science and Engineering Volume 14, Issue 2

March 2012

100 pages

ISSN:1521-9615

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Publisher

IEEE Educational Activities Department

United States

Publication History

Published: 01 March 2012

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Fang JZhang XLiu SChang Z(2019)Miss-aware LLC buffer management strategy based on heterogeneous multi-coreThe Journal of Supercomputing10.1007/s11227-019-02763-375:8(4519-4528)Online publication date: 1-Aug-2019
https://dl.acm.org/doi/10.1007/s11227-019-02763-3
Tagliavini GHaugou GMarongiu ABenini L(2018)Optimizing memory bandwidth exploitation for OpenVX applications on embedded many-core acceleratorsJournal of Real-Time Image Processing10.1007/s11554-015-0544-015:1(73-92)Online publication date: 1-Jun-2018
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Noack MWende FSteinke TCordes FDamkroger TDongarra J(2014)A unified programming model for intra- and inter-node offloading on Xeon Phi clustersProceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis10.1109/SC.2014.22(203-214)Online publication date: 16-Nov-2014
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Marongiu ACapotondi ATagliavini GBenini LDaneshtalab MHemani APalesi M(2013)Improving the programmability of STHORM-based heterogeneous systems with offload-enabled OpenMPProceedings of the First International Workshop on Many-core Embedded Systems10.1145/2489068.2489069(1-8)Online publication date: 24-Jun-2013
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Mattes OKarl W(2013)Self-aware MemoryDesign Automation for Embedded Systems10.1007/s10617-014-9153-617:3-4(739-769)Online publication date: 1-Sep-2013
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Using many-core coprocessor to boost up Erlang VM

Designing and dynamically load balancing hybrid LU for multi/many-core

Multi- and many-core data mining with adaptive sparse grids

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