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Data-Dependency Graph Transformations for Superblock Scheduling

Published: 09 December 2006 Publication History

Abstract

The superblock is a scheduling region which exposes instruction level parallelism beyond the basic block through speculative execution of instructions. In gen- eral, scheduling superblocks is an NP-Hard optimiza- tion and prior work includes both heuristic (polynomial- time) and optimal (enumerative) scheduling techniques. This paper presents a set of transformations to the data-dependency graph which significantly improves the results of heuristic and enumerative superblock scheduling. The graph transformations prune redun- dant and inferior schedules from the problem solution space. Heuristically scheduling the transformed data- dependency graphs yields significant reduction in ex- pected execution time for hard superblocks. Also, enu- meratively scheduling the transformed graphs is faster, and an optimal schedule is found for more problem in- stances within a bounded time. The transformations are applied to superblocks generated with the GNU Compiler Collection (GCC) using the SPEC CPU2000 benchmarks targeted to various processor models. The experimental results confirm that the transformations significantly improve the results for heuristic and enu- merative superblock scheduling.

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Cited By

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  • (2022)Register-Pressure-Aware Instruction Scheduling Using Ant Colony OptimizationACM Transactions on Architecture and Code Optimization10.1145/350555819:2(1-23)Online publication date: 30-Jun-2022
  • (2022)Graph transformations for register-pressure-aware instruction schedulingProceedings of the 31st ACM SIGPLAN International Conference on Compiler Construction10.1145/3497776.3517771(41-53)Online publication date: 19-Mar-2022
  • (2019)Exploring an Alternative Cost Function for Combinatorial Register-Pressure-Aware Instruction SchedulingACM Transactions on Architecture and Code Optimization10.1145/330148916:1(1-30)Online publication date: 27-Feb-2019
  • Show More Cited By

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      cover image ACM Conferences
      MICRO 39: Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
      December 2006
      493 pages
      ISBN:0769527329

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      IEEE Computer Society

      United States

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      Published: 09 December 2006

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      MICRO 39 Paper Acceptance Rate 42 of 174 submissions, 24%;
      Overall Acceptance Rate 484 of 2,242 submissions, 22%

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      View all
      • (2022)Register-Pressure-Aware Instruction Scheduling Using Ant Colony OptimizationACM Transactions on Architecture and Code Optimization10.1145/350555819:2(1-23)Online publication date: 30-Jun-2022
      • (2022)Graph transformations for register-pressure-aware instruction schedulingProceedings of the 31st ACM SIGPLAN International Conference on Compiler Construction10.1145/3497776.3517771(41-53)Online publication date: 19-Mar-2022
      • (2019)Exploring an Alternative Cost Function for Combinatorial Register-Pressure-Aware Instruction SchedulingACM Transactions on Architecture and Code Optimization10.1145/330148916:1(1-30)Online publication date: 27-Feb-2019
      • (2013)A constraint programming approach for integrated spatial and temporal scheduling for clustered architecturesACM Transactions on Embedded Computing Systems10.1145/251247013:1(1-23)Online publication date: 5-Sep-2013

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