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Designing a Programmable Wire-Speed Regular-Expression Matching Accelerator

Published: 01 December 2012 Publication History

Abstract

A growing number of applications rely on fast pattern matching to scan data in real-time for security and analytics purposes. The RegX accelerator in the IBM Power Edge of Network (PowerEN) processor supports these applications using a combination of fast programmable state machines and simple processing units to scan data streams against thousands of regular-expression patterns at state-of-the-art Ethernet link speeds. RegX employs a special rule cache and includes several new micro-architectural features that enable various instruction dispatch and execution options for the processing units. The architecture applies RISC philosophy to special-purpose computing: hardware provides fast, simple primitives, typically performed in a single cycle, which are exploited by an intelligent compiler and system software for high performance. This approach provides the flexibility required to achieve good performance across a wide range of workloads. As implemented in the PowerEN processor, the accelerator achieves a theoretical peak scan rate of 73.6 Gbit/s, and a measured scan rate of about 15 to 40 Gbit/s for typical intrusion detection workloads.

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cover image ACM Conferences
MICRO-45: Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture
December 2012
487 pages
ISBN:9780769549248

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IEEE Computer Society

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Published: 01 December 2012

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Overall Acceptance Rate 484 of 2,242 submissions, 22%

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  • (2025)Combining MLIR Dialects with Domain-Specific Architecture for Efficient Regular Expression MatchingProceedings of the 23rd ACM/IEEE International Symposium on Code Generation and Optimization10.1145/3696443.3708916(255-270)Online publication date: 1-Mar-2025
  • (2024)A Transducers-based Programming Framework for Efficient Data TransformationProceedings of the 2024 International Conference on Parallel Architectures and Compilation Techniques10.1145/3656019.3676891(66-77)Online publication date: 14-Oct-2024
  • (2024)ALVEARE: a Domain-Specific Framework for Regular ExpressionsProceedings of the 61st ACM/IEEE Design Automation Conference10.1145/3649329.3657378(1-6)Online publication date: 23-Jun-2024
  • (2024)BVAP: Energy and Memory Efficient Automata Processing for Regular Expressions with Bounded RepetitionsProceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 210.1145/3620665.3640412(151-166)Online publication date: 27-Apr-2024
  • (2023)Exploiting Structure in Regular Expression QueriesProceedings of the ACM on Management of Data10.1145/35892971:2(1-28)Online publication date: 20-Jun-2023
  • (2023)hAP: A Spatial-von Neumann Heterogeneous Automata Processor with Optimized Resource and IO Overhead on FPGAProceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays10.1145/3543622.3573190(185-196)Online publication date: 12-Feb-2023
  • (2022)Software-hardware codesign for efficient in-memory regular pattern matchingProceedings of the 43rd ACM SIGPLAN International Conference on Programming Language Design and Implementation10.1145/3519939.3523456(733-748)Online publication date: 9-Jun-2022
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  • (2021)Sunder: Enabling Low-Overhead and Scalable Near-Data Pattern Matching AccelerationMICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3466752.3480934(311-323)Online publication date: 18-Oct-2021
  • (2020)Accelerating Legacy String Kernels via Bounded Automata LearningProceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems10.1145/3373376.3378503(235-249)Online publication date: 9-Mar-2020
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