Cited By
View all- Serres OKayi AAnbar AEl-Ghazawi T(2015)Enabling PGAS Productivity with Hardware Support for Shared Address MappingACM Transactions on Architecture and Code Optimization10.1145/284268612:4(1-26)Online publication date: 22-Dec-2015
An Architecture for Reconfigurable Multi-core Explorations
RECONFIG '11: Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs
Pages 105 - 110
Abstract
Multi-core systems are now the norm, and reconfigurable systems have shown substantial benefits over general purpose ones. This paper presents a combination of the two: a fully featured reconfigurable multi-core processor based on the Leon3 processor. The platform has important features like cache coherency, a fully running modern OS (GNU/Linux) and each core has a tightly coupled reconfigurable coprocessor unit attached. This allows the SPARC instruction set to be extended for the running application. The multi-core reconfigurable processor architecture, including the coprocessor interface, the ICAP controller and the Linux kernel driver, is presented. The experimental results show the characteristics of the platform including: area costs, the memory contention, the reprogramming cost... Speedups up to 100x are demonstrated on a cryptography test.
Recommendations
A Reconfigurable Processor Architecture Combining Multi-core and Reconfigurable Processing Unit
CIT '10: Proceedings of the 2010 10th IEEE International Conference on Computer and Information TechnologyIt’s a promising way to improve performance significantly by adding reconfigurable processing unit to a general purpose processor. In this paper, a Reconfigurable Multi-Core (RMC) architecture combining general multi-core and reconfigurable logic is ...
PACT XPP—A Self-Reconfigurable Data Processing Architecture
The eXtreme Processing Platform (XPPTM) is a new runtime-reconfigurable data processing architecture. It is based on a hierarchical array of coarsegrain, adaptive computing elements, and a packet-oriented communication network. The strength of the XPPTM ...
A reconfigurable processor architecture combining multi-core and reconfigurable processing units
It's a promising way to improve performance significantly by adding reconfigurable processing unit (RPU) to a general purpose processor. In this paper, a Reconfigurable Multi-Core (RMC) architecture combining general multi-core and reconfigurable logic ...
Comments
Information & Contributors
Information
Published In
November 2011
516 pages
ISBN:9780769545516
Publisher
IEEE Computer Society
United States
Publication History
Published: 30 November 2011
Author Tags
Qualifiers
- Article
Contributors
Other Metrics
Bibliometrics & Citations
Bibliometrics
Article Metrics
- View Citations1Total Citations
- 0Total Downloads
- Downloads (Last 12 months)0
- Downloads (Last 6 weeks)0
Reflects downloads up to 13 Nov 2024
Other Metrics
Citations
Cited By
View all- Serres OKayi AAnbar AEl-Ghazawi T(2015)Enabling PGAS Productivity with Hardware Support for Shared Address MappingACM Transactions on Architecture and Code Optimization10.1145/284268612:4(1-26)Online publication date: 22-Dec-2015
View Options
View options
Get Access
Login options
Check if you have access through your login credentials or your institution to get full access on this article.
Sign in