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10.1109/SENSORCOMM.2008.38guideproceedingsArticle/Chapter ViewAbstractPublication PagesConference Proceedingsacm-pubtype
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Area-Efficient Processor for Public-Key Cryptography in Wireless Sensor Networks

Published: 25 August 2008 Publication History

Abstract

This paper presents a versatile public-key cryptographic processor suitable for wireless sensor networks which uses minimal hardware resources while maintaining high flexibility. The processor architecture is scalable and all hardware configurations support arbitrary bit-lengths and domain parameters. The tradeoffs between hardware area and timing for the public-key operations are demonstrated on the FPGA layer of the 25mm Tyndall mote.

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  • (2010)Intrusion-resilience in mobile unattended WSNsProceedings of the 29th conference on Information communications10.5555/1833515.1833818(2303-2311)Online publication date: 14-Mar-2010
  1. Area-Efficient Processor for Public-Key Cryptography in Wireless Sensor Networks

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      cover image Guide Proceedings
      SENSORCOMM '08: Proceedings of the 2008 Second International Conference on Sensor Technologies and Applications
      August 2008
      856 pages
      ISBN:9780769533308

      Publisher

      IEEE Computer Society

      United States

      Publication History

      Published: 25 August 2008

      Author Tag

      1. ECC, RSA, Processor, Low Area, Wireless Sensor Network

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      • (2010)Intrusion-resilience in mobile unattended WSNsProceedings of the 29th conference on Information communications10.5555/1833515.1833818(2303-2311)Online publication date: 14-Mar-2010

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