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Exact Path Delay Fault Coverage Calculation of Partitioned Circuits

Published: 01 June 2009 Publication History

Abstract

Exact path delay fault (PDF) coverage calculation of large circuits with an exponential number of detectable PDFs requires exponential memory space. This often yields memory overflow in computations. One common approach to avoid memory overflow is to partition or virtually cut circuits into several subcircuits and to perform coverage calculation at the partition-level circuit. Partitioning reduces the number of PDFs to be stored in memory exponentially at the expense of losing considerable coverage. This paper describes an algorithm to improve the reported coverage value by recovering the lost PDFs up to a user-controlled degree (\Delta), which is a function of the length of cut net sequences. The reported coverage monotonically increases as \Delta increases: the exact coverage value is guaranteed when \Delta is equal to the number of consecutive partitions on the longest path. Experimental results are provided for the ISCAS85 circuits that illustrate the trade-off between the computation time, the number of partitions, the values of \Delta, and the reported coverage. The results indicate that as \Delta and the number of partitions increase, the runtime does not increase after some point since the cost of set operations reduces as more partitions are created.

Cited By

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  • (2022)Flow-Based Microfluidic Biochips With Distributed Channel Storage: Synthesis, Physical Design, and Wash OptimizationIEEE Transactions on Computers10.1109/TC.2021.305468971:2(464-478)Online publication date: 1-Feb-2022
  • (2018)Path Representation in Circuit Netlists Using Linear-Sized ZDDs with Optimal Variable OrderingJournal of Electronic Testing: Theory and Applications10.1007/s10836-018-5761-634:6(667-683)Online publication date: 1-Dec-2018

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Published In

cover image IEEE Transactions on Computers
IEEE Transactions on Computers  Volume 58, Issue 6
June 2009
144 pages

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IEEE Computer Society

United States

Publication History

Published: 01 June 2009

Author Tags

  1. Exact Coverage
  2. Graph Theory
  3. Nonenumerative
  4. Partitioned circuits
  5. Path Delay Fault
  6. Path delay fault
  7. Reliability
  8. Simulation
  9. Test generation
  10. Testing
  11. ZBDD
  12. and Fault-Tolerance
  13. exact coverage
  14. graph theory.
  15. nonenumerative
  16. partitioned circuits

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Cited By

View all
  • (2022)Flow-Based Microfluidic Biochips With Distributed Channel Storage: Synthesis, Physical Design, and Wash OptimizationIEEE Transactions on Computers10.1109/TC.2021.305468971:2(464-478)Online publication date: 1-Feb-2022
  • (2018)Path Representation in Circuit Netlists Using Linear-Sized ZDDs with Optimal Variable OrderingJournal of Electronic Testing: Theory and Applications10.1007/s10836-018-5761-634:6(667-683)Online publication date: 1-Dec-2018

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