Cited By
View all- Guo LChi YLau JSong LTian XKhatti MQiao WWang JUstun EFang ZZhang ZCong J(2023)TAPA: A Scalable Task-parallel Dataflow Programming Framework for Modern FPGAs with Co-optimization of HLS and Physical DesignACM Transactions on Reconfigurable Technology and Systems10.1145/360933516:4(1-31)Online publication date: 5-Dec-2023
- Nakatake SKarimi ZTaghavi TSarrafzadeh MZhou HMacii EYan ZMassoud Y(2007)Block placement to ensure channel routabilityProceedings of the 17th ACM Great Lakes symposium on VLSI10.1145/1228784.1228894(465-468)Online publication date: 11-Mar-2007
- Rim MMujumdar AJain RDe Leone R(1994)Optimal and heuristic algorithms for solving the binding problemIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/92.2857472:2(211-225)Online publication date: 1-Jun-1994
- Show More Cited By