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Machine Learning for Power, Energy, and Thermal Management on Multicore Processors: A Survey

Published: 01 January 2020 Publication History

Abstract

Due to the high integration density and roadblock of voltage scaling, modern multicore processors experience higher power densities than previous technology scaling nodes. When unattended, this issue might lead to temperature hot spots, that in turn may cause nonuniform aging, accelerate chip failure, impair reliability, and reduce the performance of the system. This paper presents an overview of several research efforts that propose to use machine learning (ML) techniques for power and thermal management on single-core and multicore processors. Traditional power and thermal management techniques rely on a certain <italic>a-priori</italic> knowledge of the chip&#x2019;s thermal model, as well as information of the workloads/applications to be executed (e.g., transient and average power consumption). Nevertheless, these <italic>a-priori</italic> information is not always available, and even if it is, it cannot reflect the spatial and temporal uncertainties and variations that come from the environment, the hardware, or from the workloads/applications. Contrarily, techniques based on ML can potentially adapt to varying system conditions and workloads, learning from past events in order to improve themselves as the environment changes, resulting in improved management decisions.

References

[1]
M. Shafique, S. Garg, J. Henkel, and D. Marculescu, “The EDA challenges in the dark silicon era: Temperature, reliability, and variability perspectives,” in Proc. 51st ACM/EDAC/IEEE Design Autom. Conf. (DAC), 2014, pp. 1–185.
[2]
H. Esmaeilzadeh, E. Blem, R. S. Amant, K. Sankaralingam, and D. Burger, “Dark silicon and the end of multicore scaling,” in Proc. 38th Int. Symp. Comput. Archit. (ISCA), 2011, pp. 365–376.
[3]
M. B. Taylor, “Is dark silicon useful? Harnessing the four horsemen of the coming dark silicon apocalypse,” in Proc. 49th ACM/EDAC/IEEE Design Autom. Conf. (DAC), San Francisco, CA, USA, 2012, pp. 1131–1136.
[4]
P. D. S. Manojet al., “A scalable network-on-chip microprocessor with 2.5D integrated memory and accelerator,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 64, no. 6, pp. 1432–1443, Jun. 2017.
[5]
J. Henkel, H. Khdr, S. Pagani, and M. Shafique, “New trends in dark silicon,” in Proc. 52nd ACM/EDAC/IEEE Design Autom. Conf. (DAC), Jun. 2015, pp. 1–119.
[6]
Y. Wang, M. Triki, X. Lin, A. C. Ammari, and M. Pedram, “Hierarchical dynamic power management using model-free reinforcement learning,” in Proc. Int. Symp. Qual. Electron. Design (ISQED), Mar. 2013, pp. 170–177.
[7]
S. Yue, D. Zhu, Y. Wang, and M. Pedram, “Reinforcement learning based dynamic power management with a hybrid power supply,” in Proc. 30th IEEE Int. Conf. Comput. Design (ICCD), Sep. 2012, pp. 81–86.
[8]
H. Jung and M. Pedram, “Supervised learning based power management for multicore processors,” IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 29, no. 9, pp. 1395–1408, Sep. 2010.
[9]
R. Ye and Q. Xu, “Learning-based power management for multicore processors via idle period manipulation,” IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 33, no. 7, pp. 1043–1055, Jul. 2014.
[10]
D. Xu, N. Yu, H. Huang, P. D. S. Manoj, and H. Yu, “Q-learning based voltage-swing tuning and compensation for 2.5-D memory-logic integration,” IEEE Des. Test, vol. 35, no. 2, pp. 91–99, Apr. 2018.
[11]
H. Hantao, P. D. S. Manoj, D. Xu, H. Yu, and Z. Hao, “Reinforcement learning based self-adaptive voltage-swing adjustment of 2.5D I/Os for many-core microprocessor and memory communication,” in Proc. IEEE/ACM Int. Conf. Comput.-Aided Design (ICCAD), 2014, pp. 224–229.
[12]
D. Xu, P. D. S. Manoj, H. Huang, N. Yu, and H. Yu, “An energy-efficient 2.5D through-silicon interposer I/O with self-adaptive adjustment of output-voltage swing,” in Proc. IEEE/ACM Int. Symp. Low Power Electron. Design (ISLPED), 2014, pp. 93–98.
[13]
P. D. S. Manoj, H. Yu, H. Huang, and D. Xu, “A Q-learning based self-adaptive I/O communication for 2.5D integrated many-core microprocessor and memory,” IEEE Trans. Comput., vol. 65, no. 4, pp. 1185–1196, Apr. 2016.
[14]
S. Lu, R. Tessier, and W. Burleson, “Reinforcement learning for thermal-aware many-core task allocation,” in Proc. 25th Great Lakes Symp. VLSI (GLSVLSI), 2015, pp. 379–384.
[15]
M. Otoom, P. Trancoso, H. Almasaeid, and M. Alzubaidi, “Scalable and dynamic global power management for multicore chips,” in Proc. 6th Workshop Parallel Program. Run Time Manag. Techn. Many Core Archit. (PARMA-DITAM), 2015, pp. 25–30.
[16]
A. Iranfar, S. N. Shahsavani, M. Kamal, and A. Afzali-Kusha, “A heuristic machine learning-based algorithm for power and thermal management of heterogeneous MPSoCs,” in Proc. IEEE/ACM Int. Symp. Low Power Electron. Design (ISLPED), Jul. 2015, pp. 291–296.
[17]
H. Sayadi, N. Patel, A. Sasan, and H. Homayoun, “Machine learning-based approaches for energy-efficiency prediction and scheduling in composite cores architectures,” in Proc. IEEE Int. Conf. Comput. Design (ICCD), 2017, pp. 129–136.
[18]
S. Yanget al., “Adaptive energy minimization of embedded heterogeneous systems using regression-based learning,” in Proc. Int. Workshop Power Timing Model. Optim. Simulat. (PATMOS), Sep. 2015, pp. 103–110.
[19]
P. D. S. Manoj, H. Yu, and K. Wang, “3D many-core microprocessor power management by space-time multiplexing based demand-supply matching,” IEEE Trans. Comput., vol. 64, no. 11, pp. 3022–3036, Nov. 2015.
[20]
P. D. S. Manoj, K. Wang, and H. Yu, “Peak power reduction and workload balancing by space-time multiplexing based demand-supply matching for 3D thousand-core microprocessor,” in Proc. ACM/EDAC/IEEE Design Autom. Conf., Austin, TX, USA, 2013, pp. 1–6.
[21]
K. Choi, R. Soma, and M. Pedram, “Fine-grained dynamic voltage and frequency scaling for precise energy and performance tradeoff based on the ratio of off-chip access to on-chip computation times,” IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 24, no. 1, pp. 18–28, Jan. 2005.
[22]
R. A. Shafiket al., “Learning transfer-based adaptive energy minimization in embedded systems,” IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 35, no. 6, pp. 877–890, Jun. 2016.
[23]
W. Liu, Y. Tan, and Q. Qiu, “Enhanced Q-learning algorithm for dynamic power management with performance constraint,” in Proc. Design Autom. Test Europe (DATE), Mar. 2010, pp. 602–605.
[24]
M. Triki, Y. Wang, A. C. Ammari, and M. Pedram, “Hierarchical power management of a system with autonomously power-managed components using reinforcement learning,” Integr. VLSI J., vol. 48, pp. 10–20, Jan. 2015.
[25]
M. Triki, A. C. Ammari, Y. Wang, and M. Pedram, “Reinforcement learning algorithms for dynamic power management,” in Proc. World Symp. Comput. Appl. Res. (WSCAR), Jan. 2014, pp. 1–6.
[26]
H. Shen, Y. Tan, J. Lu, Q. Wu, and Q. Qiu, “Achieving autonomous power management using reinforcement learning,” ACM Trans. Design Autom. Electron. Syst., vol. 18, no. 2, pp. 1–24, Apr. 2013.
[27]
H. Shen, J. Lu, and Q. Qiu, “Learning based DVFS for simultaneous temperature, performance and energy management,” in Proc. 13th Int. Symp. Qual. Electron. Design (ISQED), Mar. 2012, pp. 747–754.
[28]
Y. Wang, Q. Xie, A. Ammari, and M. Pedram, “Deriving a near-optimal power management policy using model-free reinforcement learning and Bayesian classification,” in Proc. 48th Design Autom. Conf. (DAC), New York, NY, USA, 2011, pp. 41–46.
[29]
Y. Ge and Q. Qiu, “Dynamic thermal management for multimedia applications using machine learning,” in Proc. 48th Design Autom. Conf. (DAC), New York, NY, USA, 2011, pp. 95–100.
[30]
M. E. Salehiet al., “Dynamic voltage and frequency scheduling for embedded processors considering power/performance tradeoffs,” IEEE Trans. Very Large Scale Integr. Syst., vol. 19, no. 10, pp. 1931–1935, Oct. 2011.
[31]
B. Dietrich, S. Nunna, D. Goswami, S. Chakraborty, and M. Gries, “LMS-based low-complexity game workload prediction for DVFS,” in Proc. IEEE Int. Conf. Comput. Design, Oct. 2010, pp. 417–424.
[32]
Y. Tan, W. Liu, and Q. Qiu, “Adaptive power management using reinforcement learning,” in Proc. Int. Conf. Comput.-Aided Design (ICCAD), San Jose, CA, USA, 2009, pp. 461–467.
[33]
G. Dhiman and T. Rosing, “System-level power management using online learning,” IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 28, no. 5, pp. 676–689, May 2009.
[34]
E.-Y. Chung, L. Benini, A. Bogliolo, Y.-H. Lu, and G. D. Micheli, “Dynamic power management for nonstationary service requests,” IEEE Trans. Comput., vol. 51, no. 11, pp. 1345–1361, Nov. 2002.
[35]
E.-Y. Chung, L. Benini, and G. De Micheli, “Dynamic power management using adaptive learning tree,” in Proc. Int. Conf. Comput.-Aided Design (ICCAD), Nov. 1999, pp. 274–279.
[36]
W. Lee, Y. Wang, and M. Pedram, “Optimizing a reconfigurable power distribution network in a multicore platform,” IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 34, no. 7, pp. 1110–1123, Jul. 2015.
[37]
F. M. M. U. Islam and M. Lin, “A framework for learning based DVFS technique selection and frequency scaling for multi-core real-time systems,” in Proc. IEEE Int. Conf. High Perform. Comput. Commun., Aug. 2015, pp. 721–726.
[38]
A. Daset al., “Reinforcement learning-based inter- and intra-application thermal optimization for lifetime improvement of multicore systems,” in Proc. 51st Design Autom. Conf. (DAC), 2014, pp. 1–170.
[39]
A. Bartolini, M. Cacciari, A. Tilli, and L. Benini, “Thermal and energy management of high-performance multicores: Distributed and self-calibrating model-predictive controller,” IEEE Trans. Parallel Distrib. Syst., vol. 24, no. 1, pp. 170–183, Jan. 2013.
[40]
A. Bartolini, M. Cacciari, A. Tilli, and L. Benini, “A distributed and self-calibrating model-predictive controller for energy and thermal management of high-performance multicores,” in Proc. Design Automation Test Europe (DATE), Mar. 2011, pp. 1–6.
[41]
R. Khanna, J. John, and T. Rangarajan, “Phase-aware predictive thermal modeling for proactive load-balancing of compute clusters,” in Proc. Int. Conf. Energy Aware Comput. (ICEAC), Dec. 2012, pp. 1–6.
[42]
T. Ebi, D. Kramer, W. Karl, and J. Henkel, “Economic learning for thermal-aware power budgeting in many-core architectures,” in Proc. 7th Int. Conf. Hardw. Softw. Codesign Syst. Synth. (CODES+ISSS), 2011, pp. 189–196.
[43]
R. Cochran and S. Reda, “Consistent runtime thermal prediction and control through workload phase detection,” in Proc. 47th Design Autom. Conf. (DAC), 2010, pp. 62–67.
[44]
J. S. Lee, K. Skadron, and S. W. Chung, “Predictive temperature-aware DVFS,” IEEE Trans. Comput., vol. 59, no. 1, pp. 127–133, Jan. 2010.
[45]
F. Sironi, M. Triverio, H. Hoffmann, M. Maggio, and M. D. Santambrogio, “Self-aware adaptation in FPGA-based systems,” in Proc. Int. Conf. Field Program. Logic Appl., Aug 2010, pp. 187–192.
[46]
W.-J. Kim, J.-W. Song, and K.-S. Chung, “On-line learning based dynamic thermal management for multicore systems,” in Proc. Int. SoC Design Conf. (ISOCC), vol. 1, Nov. 2008, pp. I-391–I-394.
[47]
A. K. Coskun, T. S. Rosing, and K. C. Gross, “Temperature management in multiprocessor SoCs using online learning,” in Proc. 45th Design Autom. Conf. (DAC), 2008, pp. 890–893.
[48]
X. Lin, Y. Wang, and M. Pedram, “A reinforcement learning-based power management framework for green computing data centers,” in Proc. IEEE Int. Conf. Cloud Eng. (IC2E), Apr. 2016, pp. 135–138.
[49]
Dual-Core Intel Xeon Processor 5100 Series Datasheet, Revision 003, Intel, Santa Clara, CA, USA, Aug. 2007.
[50]
N. Pinckneyet al., “Assessing the performance limits of parallelized near-threshold computing,” in Proc. 49th Design Autom. Conf. (DAC), 2012, pp. 1147–1152.
[51]
S. Pagani, “Power, energy, and thermal management for clustered manycores,” Ph.D. dissertation, Chair Embedded Syst., Dept. Comput. Sci., Karlsruhe Inst. Technol., Karlsruhe, Germany, Nov. 2016.
[52]
S. Herbert and D. Marculescu, “Analysis of dynamic voltage/frequency scaling in chip-multiprocessors,” in Proc. Int. Symp. Low Power Electron. Design (ISLPED), 2007, pp. 38–43.
[53]
SCC External Architecture Specification (EAS), Revision 0.98, Intel Corporat., Santa Clara, CA, USA, Jul. 2010.
[54]
Exynos 5 Octa (5422), Samsung Electron., Seoul, South Korea, 2014. [Online]. Available: www.samsung.com/exynos
[55]
S. C. Woo, M. Ohara, E. Torrie, J. P. Singh, and A. Gupta, “The SPLASH-2 programs: Characterization and methodological considerations,” SIGARCH Comput. Archit. News, vol. 23, no. 2, pp. 24–36, May 1995.
[56]
C. Bienia, S. Kumar, J. P. Singh, and K. Li, “The PARSEC benchmark suite: Characterization and architectural implications,” Dept. Comput. Sci., Princeton Univ., Princeton, NJ, USA, Rep. TR-811-08, Jan. 2008.
[57]
J. L. Henning, “SPEC CPU2006 benchmark descriptions,” SIGARCH Comput. Archit. News, vol. 34, no. 4, pp. 1–17, Sep. 2006.
[58]
Spec CPU 2017, SPEC, Richmond, VA, USA, 2017. [Online]. Available: https://www.spec.org/cpu2017/
[59]
S. Huang, J. Huang, J. Dai, T. Xie, and B. Huang, “The HiBench benchmark suite: Characterization of the MapReduce-based data analysis,” in Proc. IEEE Int. Conf. Data Eng. Workshops, 2010, pp. 41–51.
[60]
Z. Jiaet al., “Understanding big data analytics workloads on modern processors,” IEEE Trans. Parallel Distrib. Syst., vol. 28, no. 6, pp. 1797–1810, Jun. 2017.
[61]
M. Mohri, A. Rostamizadeh, and A. Talwalkar, Foundations of Machine Learning. Cambridge, MA, USA: MIT Press, 2012.
[62]
Z. Wanget al., “Modular reinforcement learning for self-adaptive energy efficiency optimization in multicore system,” in Proc. Asia South Pac. Design Autom. Conf. (ASP-DAC), 2017, pp. 684–689.
[63]
G.-Y. Pan, B.-C. C. Lai, S.-Y. Chen, and J.-Y. Jou, “A learning-on-cloud power management policy for smart devices,” in Proc. IEEE ACM Int. Conf. Comput.-Aided Design (ICCAD), San Jose, CA, USA, 2014, pp. 376–381.
[64]
P. D. S. Manoj, “3D I/O designs for energy-efficient memory-logic integration towards thousand-core on-chip,” Ph.D. dissertation, School Elect. Electron. Eng., Nanyang Technol. Univ., Singapore, Nov. 2015.
[65]
R. S. Sutton and A. G. Barto, Reinforcement Learning: An Introduction. Cambridge, MA, USA: MIT Press, 1998.
[66]
I. Hur and C. Lin, “A comprehensive approach to DRAM power management,” in Proc. IEEE Int. Symp. High Perform. Comput. Archit., 2008, pp. 305–316.
[67]
V. Delaluz, M. Kandemir, N. Vijaykrishnan, A. Sivasubramaniam, and M. J. Irwin, “DRAM energy management using software and hardware directed power mode control,” in Proc. Int. Symp. High Perform. Comput. Archit., 2001, pp. 159–169.
[68]
B. K. Mathew, S. A. McKee, J. B. Carter, and A. Davis, “Design of a parallel vector access unit for SDRAM memory systems,” in Proc. Int. Symp. High Perform. Comput. Archit., 2000, pp. 39–48.
[69]
W. Felter, K. Rajamani, T. Keller, and C. Rusu, “A performance-conserving approach for reducing peak power consumption in server systems,” in Proc. Int. Conf. Supercomput., 2005, pp. 293–302.
[70]
J. Lin, H. Zheng, Z. Zhu, H. David, and Z. Zhang, “Thermal modeling and management of DRAM memory systems,” SIGARCH Comput. Archit. News, vol. 35, no. 2, pp. 312–322, Jun. 2007.
[71]
Y. Lu, D. Wu, B. He, X. Tang, J. Xu, and M. Guo, “Rank-aware dynamic migrations and adaptive demotions for DRAM power management,” IEEE Trans. Comput., vol. 65, no. 1, pp. 187–202, Jan. 2016.
[72]
H. Huang, K. G. Shin, C. Lefurgy, and T. Keller, “Improving energy efficiency by making DRAM less randomly accessed,” in Proc. Int. Symp. Low Power Electron. Design, 2005, pp. 393–398.
[73]
H. Huang, P. Pillai, and K. G. Shin, “Design and implementation of power-aware virtual memory,” in Proc. USENIX Annu. Tech. Conf., 2003, p. 5.
[74]
Y. Lu, B. He, X. Tang, and M. Guo, “Synergy of dynamic frequency scaling and demotion on DRAM power management: Models and optimizations,” IEEE Trans. Comput., vol. 64, no. 8, pp. 2367–2381, Aug. 2015.
[75]
G. Liang and A. Jantsch, “Adaptive power management for the on-chip communication network,” in Proc. EUROMICRO Conf. Digit. Syst. Design, 2006, pp. 649–656.
[76]
L. Shang, L. Peh, and N. K. Jha, “Power-efficient interconnection networks: Dynamic voltage scaling with links,” IEEE Comput. Archit. Lett., vol. 1, no. 1, p. 6, Jan./Dec. 2002.
[77]
A. K. Mishraet al., “A case for dynamic frequency tuning in on-chip networks,” in Proc. IEEE/ACM Int. Symp. Microarchit. (MICRO), New York, NY, USA, 2009, pp. 292–303.

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      cover image IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
      IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  Volume 39, Issue 1
      Jan. 2020
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