research-article

SPI: a system model for heterogeneously specified embedded systems

Authors:

Dirk Ziegenbein,

Jürgen TeichAuthors Info & Claims

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 10, Issue 4

Pages 379 - 389

https://doi.org/10.1109/TVLSI.2002.807767

Published: 01 August 2002 Publication History

Abstract

Embedded systems typically include reactive and transformative functions, often described in different languages and semantics which are well established in their respective application domains. Additionally, a large part of the system functionality and components is reused from previous designs including legacy code. There is little hope that a single language will replace this heterogeneous set of languages. A design process must be able to bridge the semantic differences for verification and synthesis and should account for limited knowledge of system properties. This paper presents the system property intervals (SPI) model, which employs behavioral intervals and process modes to allow the common representation of different languages and semantics. This model is the basis of a workbench which is targeted at the design of heterogeneously specified embedded systems.

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Cited By

Falk JZebelein CKeinert JHaubelt CTeich JBhattacharyya S(2011)Analysis of SystemC actor networks for efficient synthesisACM Transactions on Embedded Computing Systems10.1145/1880050.188005410:2(1-34)Online publication date: 7-Jan-2011
https://dl.acm.org/doi/10.1145/1880050.1880054
Ophelders FChakraborty SCorporaal HGebotys CMartin G(2008)Intra- and inter-processor hybrid performance modeling for MPSoC architecturesProceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis10.1145/1450135.1450156(91-96)Online publication date: 19-Oct-2008
https://dl.acm.org/doi/10.1145/1450135.1450156
(2008)Classification of General Data Flow Actors into Known Models of ComputationProceedings of the Sixth ACM/IEEE International Conference on Formal Methods and Models for Co-Design10.1109/MEMCOD.2008.4547699(119-128)Online publication date: 1-Jun-2008
https://dl.acm.org/doi/10.1109/MEMCOD.2008.4547699
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SPI: a system model for heterogeneously specified embedded systems

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cover image IEEE Transactions on Very Large Scale Integration (VLSI) Systems

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Volume 10, Issue 4

August 2002

143 pages

ISSN:1063-8210

Issue’s Table of Contents

Copyright © 2002.

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IEEE Educational Activities Department

United States

Publication History

Published: 01 August 2002

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Cited By

Falk JZebelein CKeinert JHaubelt CTeich JBhattacharyya S(2011)Analysis of SystemC actor networks for efficient synthesisACM Transactions on Embedded Computing Systems10.1145/1880050.188005410:2(1-34)Online publication date: 7-Jan-2011
https://dl.acm.org/doi/10.1145/1880050.1880054
Ophelders FChakraborty SCorporaal HGebotys CMartin G(2008)Intra- and inter-processor hybrid performance modeling for MPSoC architecturesProceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis10.1145/1450135.1450156(91-96)Online publication date: 19-Oct-2008
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(2008)Classification of General Data Flow Actors into Known Models of ComputationProceedings of the Sixth ACM/IEEE International Conference on Formal Methods and Models for Co-Design10.1109/MEMCOD.2008.4547699(119-128)Online publication date: 1-Jun-2008
https://dl.acm.org/doi/10.1109/MEMCOD.2008.4547699
Loghi MBenini LPoncino M(2007)Power macromodeling of MPSoC message passing primitivesACM Transactions on Embedded Computing Systems10.1145/1274858.12748696:4(31-es)Online publication date: 1-Sep-2007
https://dl.acm.org/doi/10.1145/1274858.1274869
Maxiaguine AKünzli SThiele L(2004)Workload Characterization Model for Tasks with Variable Execution DemandProceedings of the conference on Design, automation and test in Europe - Volume 210.5555/968879.969150Online publication date: 16-Feb-2004
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Thiele LWilhelm R(2004)Design for Timing PredictabilityReal-Time Systems10.1023/B:TIME.0000045316.66276.6e28:2-3(157-177)Online publication date: 1-Nov-2004
https://dl.acm.org/doi/10.1023/B%3ATIME.0000045316.66276.6e
Jersak MRichter KHenia RErnst RSlomka FHenkel JHu XGupta RParameswaran S(2002)Transformation of SDL specifications for system-level timing analysisProceedings of the tenth international symposium on Hardware/software codesign10.1145/774789.774815(121-126)Online publication date: 6-May-2002
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Thiele LChakraborty SGries MKünzli SAckland B(2002)A framework for evaluating design tradeoffs in packet processing architecturesProceedings of the 39th annual Design Automation Conference10.1145/513918.514136(880-885)Online publication date: 10-Jun-2002
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