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High-performance IPv6 forwarding algorithm for multi-core and multithreaded network processor

Published: 29 March 2006 Publication History

Abstract

IP forwarding is one of the main bottlenecks in Internet backbone routers, as it requires performing the longest-prefix match at 10Gbps speed or higher. IPv6 forwarding further exacerbates the situation because its search space is quadrupled. We propose a high-performance IPv6 forwarding algorithm TrieC, and implement it efficiently on the Intel IXP2800 network processor (NPU). Programming the multi-core and multithreaded NPU is a daunting task. We study the interaction between the parallel algorithm design and the architecture mapping to facilitate efficient algorithm implementation. We experiment with an architecture-aware design principle to guarantee the high performance of the resulting algorithm.This paper investigates the main software design issues that have dramatic performance impacts on any NPU based implementation: memory space reduction, instruction selection, data allocation, task partitioning, latency hiding, and thread synchronization. In the paper, we provide insight on how to design an NPU-aware algorithm for high-performance networking applications. Based on the detailed performance analysis of the TrieC algorithm, we provide guidance on developing high-performance networking applications for the multi-core and multithreaded architecture.

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cover image ACM Conferences
PPoPP '06: Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming
March 2006
258 pages
ISBN:1595931899
DOI:10.1145/1122971
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 29 March 2006

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Author Tags

  1. IPv6 forwarding
  2. multithreading
  3. network processor
  4. parallel programming
  5. pipelining
  6. table lookup
  7. thread-level parallelism

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  • (2016)A High Performance IPv6 Flow Table Lookup Algorithm Based on HashProceedings of the 2016 ACM International on Workshop on Traffic Measurements for Cybersecurity10.1145/2903185.2903187(35-39)Online publication date: 30-May-2016
  • (2011)Efficient GPGPU-Based Parallel Packet ClassificationProceedings of the 2011IEEE 10th International Conference on Trust, Security and Privacy in Computing and Communications10.1109/TrustCom.2011.186(1367-1374)Online publication date: 16-Nov-2011
  • (2010)A flow label hash compression method applied to IPv6 network traffic analysis system2010 3rd IEEE International Conference on Broadband Network and Multimedia Technology (IC-BNMT)10.1109/ICBNMT.2010.5704883(138-143)Online publication date: Oct-2010
  • (2009)FlashlookProceedings of the 15th international conference on High Performance Switching and Routing10.5555/1715730.1715733(14-21)Online publication date: 22-Jun-2009
  • (2009)Practice of parallelizing network applications on multi-core architecturesProceedings of the 23rd international conference on Supercomputing10.1145/1542275.1542307(204-213)Online publication date: 8-Jun-2009
  • (2009)Protocol offload analysis by simulationJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2008.07.00555:1(25-42)Online publication date: 1-Jan-2009
  • (2008)Scalable packet classification using interpretingProceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming10.1145/1345206.1345214(33-42)Online publication date: 20-Feb-2008
  • (2008)High-performance packet classification algorithm for multithreaded IXP network processorACM Transactions on Embedded Computing Systems10.1145/1331331.13313407:2(1-25)Online publication date: 29-Jan-2008
  • (2007)Towards high-performance flow-level packet processing on multi-core network processorsProceedings of the 3rd ACM/IEEE Symposium on Architecture for networking and communications systems10.1145/1323548.1323552(17-26)Online publication date: 3-Dec-2007
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