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Adaptive insertion policies for high performance caching

Published: 09 June 2007 Publication History

Abstract

The commonly used LRU replacement policy is susceptible to thrashing for memory-intensive workloads that have a working set greater than the available cache size. For such applications, the majority of lines traverse from the MRU position to the LRU position without receiving any cache hits, resulting in inefficient use of cache space. Cache performance can be improved if some fraction of the working set is retained in the cache so that at least that fraction of the working set can contribute to cache hits.
We show that simple changes to the insertion policy can significantly reduce cache misses for memory-intensive workloads. We propose the LRU Insertion Policy (LIP) which places the incoming line in the LRU position instead of the MRU position. LIP protects the cache from thrashing and results in close to optimal hitrate for applications that have a cyclic reference pattern. We also propose the Bimodal Insertion Policy (BIP) as an enhancement of LIP that adapts to changes in the working set while maintaining the thrashing protection of LIP. We finally propose a Dynamic Insertion Policy (DIP) to choose between BIP and the traditional LRU policy depending on which policy incurs fewer misses. The proposed insertion policies do not require any change to the existing cache structure, are trivial to implement, and have a storage requirement of less than two bytes. We show that DIP reduces the average MPKI of the baseline 1MB 16-way L2 cache by 21%, bridging two-thirds of the gap between LRU and OPT.

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    Published In

    cover image ACM Conferences
    ISCA '07: Proceedings of the 34th annual international symposium on Computer architecture
    June 2007
    542 pages
    ISBN:9781595937063
    DOI:10.1145/1250662
    • General Chair:
    • Dean Tullsen,
    • Program Chair:
    • Brad Calder
    • cover image ACM SIGARCH Computer Architecture News
      ACM SIGARCH Computer Architecture News  Volume 35, Issue 2
      May 2007
      527 pages
      ISSN:0163-5964
      DOI:10.1145/1273440
      Issue’s Table of Contents
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 09 June 2007

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    Author Tags

    1. replacement
    2. set dueling
    3. set sampling
    4. thrashing

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    • (2024)LSTM-CRP: Algorithm-Hardware Co-Design and Implementation of Cache Replacement Policy Using Long Short-Term MemoryBig Data and Cognitive Computing10.3390/bdcc81001408:10(140)Online publication date: 21-Oct-2024
    • (2024)Last-Level Cache Side-Channel Attacks Are Feasible in the Modern Public CloudProceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 210.1145/3620665.3640403(582-600)Online publication date: 27-Apr-2024
    • (2023)E=MC^2: Efficient Mobility Centric CachingProceedings of the International Symposium on Memory Systems10.1145/3631882.3631892(1-5)Online publication date: 2-Oct-2023
    • (2023)P4LRU: Towards An LRU Cache Entirely in Programmable Data PlaneProceedings of the ACM SIGCOMM 2023 Conference10.1145/3603269.3604813(967-980)Online publication date: 10-Sep-2023
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    • (2023)Last-Level Cache Insertion and Promotion Policy in the Presence of Aggressive PrefetchingIEEE Computer Architecture Letters10.1109/LCA.2023.324217822:1(17-20)Online publication date: Jan-2023
    • (2023)Improving the Execution Time of Industrial Applications through Planned Cache Eviction Policy Selection2023 IEEE 32nd International Symposium on Industrial Electronics (ISIE)10.1109/ISIE51358.2023.10228033(1-6)Online publication date: 19-Jun-2023
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