Article

STMBench7: a benchmark for software transactional memory

Authors:

Rachid Guerraoui,

Michal Kapalka,

Jan VitekAuthors Info & Claims

EuroSys '07: Proceedings of the 2nd ACM SIGOPS/EuroSys European Conference on Computer Systems 2007

Pages 315 - 324

https://doi.org/10.1145/1272996.1273029

Published: 21 March 2007 Publication History

Get Access

Abstract

Software transactional memory (STM) is a promising technique for controlling concurrency in modern multi-processor architectures. STM aims to be more scalable than explicit coarse-grained locking and easier to use than fine-grained locking. However, STM implementations have yet to demonstrate that their runtime overheads are acceptable. To date, empiric evaluations of these implementations have suffered from the lack of realistic benchmarks. Measuring performance of an STM in an overly simplified setting can be at best uninformative and at worst misleading as it may steer researchers to try to optimize irrelevant aspects of their implementations.

This paper presents STMBench7: a candidate benchmark for evaluating STM implementations. The underlying data structure consists of a set of graphs and indexes intended to be suggestive of many complex applications, e.g., CAD/CAM. A collection of operations is supported to model a wide range of workloads and concurrency patterns. Companion locking strategies serve as a baseline for STM performance comparisons. STMBench7 strives for simplicity. Users may choose a workload, number of threads, benchmark length, as well as the possibility of structure modification and the nature of traversals of shared data structures. We illustrate the use of STMBench7 with an evaluation of a well-known software transactional memory implementation.

References

[1]

The OO7 benchmark. ftp://ftp.cs.wisc.edu/oo7.

Google Scholar

[2]

RSTM---the Rochester software transactional memory runtime. http://www.cs.rochester.edu/research/synchronization/rstm.

Google Scholar

[3]

STMBench7 home page. http://lpd.epfl.ch/kapalka/stmbench7.php.

Google Scholar

[4]

M. J. Carey, D. J. DeWitt, and J. F. Naughton. The OO7 benchmark. SIGMOD Record (ACM Special Interest Group on Management of Data), 22(2):12--21, 1993.

Digital Library

Google Scholar

[5]

D. Dice, O. Shalev, and N. Shavit. Transactional locking II. In Proceedings of the 20th International Symposium on Distributed Computing (DISC'06), 2006.

Digital Library

Google Scholar

[6]

M. Herlihy. SXM software transactional memory package for C#. http://www.cs.brown.edu/~mph.

Google Scholar

[7]

M. Herlihy, V. Luchangco, and M. Moir. A flexible framework for implementing software transactional memory. In Proceedings of the ACM SIGPLAN International Conference on Object-Oriented Programming, Systems, Languages and Applications (OOPSLA'06), pages 253--262, 2006.

Digital Library

Google Scholar

[8]

M. Herlihy, V. Luchangco, M. Moir, and W. N. Scherer III. Software transactional memory for dynamic-sized data structures. In Proceedings of the 22th Annual ACM Symposium on Principles of Distributed Computing (PODC), pages 92--101, 2003.

Digital Library

Google Scholar

[9]

M. Herlihy and J. E. B. Moss. Transactional memory: Architectural support for lock-free data structures. In Proceedings of the 20th Annual International Symposium on Computer Architecture, pages 289--300. May 1993.

Digital Library

Google Scholar

[10]

V. J. Maranthe, W. N. Scherer III, and M. L. Scott. Adaptive software transactional memory. In Proceedings of the 19th International Symposium on Distributed Computing (DISC'05), pages 354--368, 2005.

Digital Library

Google Scholar

[11]

V. J. Marathe, M. F. Spear, C. Heriot, A. Acharya, D. Eisenstat, W. N. Scherer III, and M. L. Scott. Lowering the overhead of software transactional memory. In Proceedings of the 1st ACM SIGPLAN Workshop on Languages, Compilers, and Hardware Support for Transactional Computing (Transact '06), 2006.

Google Scholar

[12]

T. Riegel, P. Felber, and C. Fetzer. A lazy snapshot algorithm with eager validation. In Proceedings of the 20th International Symposium on Distributed Computing (DISC'06), 2006.

Digital Library

Google Scholar

[13]

N. Shavit and D. Touitou. Software transactional memory. In Proceedings of the 14th Annual ACM Symposium on Principles of Distributed Computing (PODC), pages 204213. Aug 1995.

Digital Library

Google Scholar

[14]

M. F. Spear, V. J. Marathe, W. N. Scherer III, and M. L. Scott. Conflict detection and validation strategies for software transactional memory. In Proceedings of the 20th International Symposium on Distributed Computing (DISC'06), 2006.

Digital Library

Google Scholar

Cited By

View all

Čugurović MVujošević Janičić MJovanović VWürthinger T(2024)GraalSP: Polyglot, efficient, and robust machine learning-based static profilerJournal of Systems and Software10.1016/j.jss.2024.112058213(112058)Online publication date: Jul-2024
https://doi.org/10.1016/j.jss.2024.112058
Mongandampulath Akathoott ANasre R(2024)FlexiGran: Flexible Granularity Locking in HierarchiesEuro-Par 2024: Parallel Processing10.1007/978-3-031-69577-3_1(3-17)Online publication date: 26-Aug-2024
https://doi.org/10.1007/978-3-031-69577-3_1
Suchert FCastrillon J(2023)STAMP-Rust: Language and Performance Comparison to C on Transactional BenchmarksBenchmarking, Measuring, and Optimizing10.1007/978-3-031-31180-2_10(160-175)Online publication date: 13-May-2023
https://doi.org/10.1007/978-3-031-31180-2_10
Show More Cited By

Index Terms

STMBench7: a benchmark for software transactional memory

Recommendations

STMBench7: a benchmark for software transactional memory
EuroSys'07 Conference Proceedings

Software transactional memory (STM) is a promising technique for controlling concurrency in modern multi-processor architectures. STM aims to be more scalable than explicit coarse-grained locking and easier to use than fine-grained locking. However, STM ...
An efficient software transactional memory using commit-time invalidation
CGO '10: Proceedings of the 8th annual IEEE/ACM international symposium on Code generation and optimization

To improve the performance of transactional memory (TM), researchers have found many eager and lazy optimizations for conflict detection, the process of determining if transactions can commit. Despite these optimizations, nearly all TMs perform one ...
Safe privatization in transactional memory
PPoPP '18

Transactional memory (TM) facilitates the development of concurrent applications by letting the programmer designate certain code blocks as atomic. Programmers using a TM often would like to access the same data both inside and outside transactions, ...

Comments

Information & Contributors

Information

Published In

EuroSys '07: Proceedings of the 2nd ACM SIGOPS/EuroSys European Conference on Computer Systems 2007

March 2007

431 pages

ISBN:9781595936363

DOI:10.1145/1272996

ACM SIGOPS Operating Systems Review Volume 41, Issue 3
EuroSys'07 Conference Proceedings
June 2007
386 pages
ISSN:0163-5980
DOI:10.1145/1272998
Issue’s Table of Contents

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 21 March 2007

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Author Tags

Qualifiers

Article

Conference

EuroSys07

Sponsor:

SIGOPS

EuroSys07: Eurosys 2007 Conference

March 21 - 23, 2007

Lisbon, Portugal

Acceptance Rates

Overall Acceptance Rate 241 of 1,308 submissions, 18%

Upcoming Conference

EuroSys '25

Sponsor:
sigops

Twentieth European Conference on Computer Systems

March 30 - April 3, 2025

Rotterdam , Netherlands

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

155
Total Citations
View Citations
579
Total Downloads

Downloads (Last 12 months)15
Downloads (Last 6 weeks)0

Reflects downloads up to 01 Jan 2025

Other Metrics

View Author Metrics

Citations

Cited By

View all

Čugurović MVujošević Janičić MJovanović VWürthinger T(2024)GraalSP: Polyglot, efficient, and robust machine learning-based static profilerJournal of Systems and Software10.1016/j.jss.2024.112058213(112058)Online publication date: Jul-2024
https://doi.org/10.1016/j.jss.2024.112058
Mongandampulath Akathoott ANasre R(2024)FlexiGran: Flexible Granularity Locking in HierarchiesEuro-Par 2024: Parallel Processing10.1007/978-3-031-69577-3_1(3-17)Online publication date: 26-Aug-2024
https://doi.org/10.1007/978-3-031-69577-3_1
Suchert FCastrillon J(2023)STAMP-Rust: Language and Performance Comparison to C on Transactional BenchmarksBenchmarking, Measuring, and Optimizing10.1007/978-3-031-31180-2_10(160-175)Online publication date: 13-May-2023
https://doi.org/10.1007/978-3-031-31180-2_10
Anju MNasre R(2022)Multi-Interval DomLock: Toward Improving Concurrency in HierarchiesACM Transactions on Parallel Computing10.1145/35435439:3(1-27)Online publication date: 18-Aug-2022
https://dl.acm.org/doi/10.1145/3543543
Prokopec ADuboscq GLeopoldseder DWürthinger TKandemir MJimborean AMoseley T(2019)An optimization-driven incremental inline substitution algorithm for just-in-time compilersProceedings of the 2019 IEEE/ACM International Symposium on Code Generation and Optimization10.5555/3314872.3314893(164-179)Online publication date: 16-Feb-2019
https://dl.acm.org/doi/10.5555/3314872.3314893
Kordic BPopovic MPopovic MGoldstein MAmitay MDayan D(2019)A Protein Structure Prediction Program Architecture Based on a Software Transactional MemoryProceedings of the 6th Conference on the Engineering of Computer Based Systems10.1145/3352700.3352701(1-9)Online publication date: 2-Sep-2019
https://dl.acm.org/doi/10.1145/3352700.3352701
Prokopec ARosà ALeopoldseder DDuboscq GTůma PStudener MBulej LZheng YVillazón ASimon DWürthinger TBinder WMcKinley KFisher K(2019)Renaissance: benchmarking suite for parallel applications on the JVMProceedings of the 40th ACM SIGPLAN Conference on Programming Language Design and Implementation10.1145/3314221.3314637(31-47)Online publication date: 8-Jun-2019
https://dl.acm.org/doi/10.1145/3314221.3314637
Prokopec ADuboscq GLeopoldseder DWirthinger T(2019)An Optimization-Driven Incremental Inline Substitution Algorithm for Just-in-Time Compilers2019 IEEE/ACM International Symposium on Code Generation and Optimization (CGO)10.1109/CGO.2019.8661171(164-179)Online publication date: Feb-2019
https://doi.org/10.1109/CGO.2019.8661171
Kalikar SNasre R(2019)Toggle: Contention-Aware Task Scheduler for Concurrent Hierarchical OperationsEuro-Par 2019: Parallel Processing10.1007/978-3-030-29400-7_11(142-155)Online publication date: 26-Aug-2019
https://dl.acm.org/doi/10.1007/978-3-030-29400-7_11
Kalikar SNasre R(2018)NumLockProceedings of the 47th International Conference on Parallel Processing10.1145/3225058.3225141(1-10)Online publication date: 13-Aug-2018
https://dl.acm.org/doi/10.1145/3225058.3225141
Show More Cited By

View Options

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Cited By

Index Terms

Recommendations

STMBench7: a benchmark for software transactional memory

An efficient software transactional memory using commit-time invalidation

Safe privatization in transactional memory